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author | Max Filippov <jcmvbkbc@gmail.com> | 2013-03-04 03:40:42 +0400 |
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committer | Chris Zankel <chris@zankel.net> | 2013-05-09 01:07:09 -0700 |
commit | d83ff0bb828854d9e7172ac5d8d007a7466934c9 (patch) | |
tree | 188dfa08078c116698d4673a42a38b40e75a4ccb /arch/xtensa/mm/mmu.c | |
parent | 74f5bf029ee052e3d845672728e80b7240d14f09 (diff) | |
download | op-kernel-dev-d83ff0bb828854d9e7172ac5d8d007a7466934c9.zip op-kernel-dev-d83ff0bb828854d9e7172ac5d8d007a7466934c9.tar.gz |
xtensa: fix ibreakenable register update
Only set the register when there is at least one ibreak register,
otherwise the build fails:
arch/xtensa/kernel/head.S:105: Error: invalid register 'ibreakenable'
for 'wsr' instruction
arch/xtensa/platforms/iss/setup.c:67: Error: invalid register
'ibreakenable' for 'wsr' instruction
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/mm/mmu.c')
0 files changed, 0 insertions, 0 deletions