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authorMax Filippov <jcmvbkbc@gmail.com>2013-12-01 12:04:57 +0400
committerChris Zankel <chris@zankel.net>2014-01-14 10:19:58 -0800
commit26a8e96a8b37e8070fa9dcb1b7490cf4d4492d50 (patch)
tree5104a9c1e12dd3728b05db5b21b5033bd7b648d2 /arch/xtensa/kernel
parentbae07f8a9dfaf6268f2fba5522b70bce6fc7d718 (diff)
downloadop-kernel-dev-26a8e96a8b37e8070fa9dcb1b7490cf4d4492d50.zip
op-kernel-dev-26a8e96a8b37e8070fa9dcb1b7490cf4d4492d50.tar.gz
xtensa: add MX irqchip
MX is an interrupt distributor used in some SMP-capable xtensa configurations. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/kernel')
-rw-r--r--arch/xtensa/kernel/irq.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
index 3cef58e..7d49730 100644
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -123,6 +123,14 @@ unsigned xtensa_map_ext_irq(unsigned ext_irq)
return XCHAL_NUM_INTERRUPTS;
}
+unsigned xtensa_get_ext_irq_no(unsigned irq)
+{
+ unsigned mask = (XCHAL_INTTYPE_MASK_EXTERN_EDGE |
+ XCHAL_INTTYPE_MASK_EXTERN_LEVEL) &
+ ((1u << irq) - 1);
+ return hweight32(mask);
+}
+
void __init init_IRQ(void)
{
#ifdef CONFIG_OF
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