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author | Thomas Gleixner <tglx@linutronix.de> | 2014-03-12 16:01:07 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2014-03-12 16:01:07 +0100 |
commit | ffb12cf002edbc5927079f51bebde428d601f723 (patch) | |
tree | 1f04d80df9db8883037d59c81f5836770eecfdc6 /arch/xtensa/include/asm/traps.h | |
parent | 1a75b8e64571a85d5e648cfdf4c40e0d9923abc5 (diff) | |
parent | c1bacbae8192dd2a9ebadd22d793b68054f6c6e5 (diff) | |
download | op-kernel-dev-ffb12cf002edbc5927079f51bebde428d601f723.zip op-kernel-dev-ffb12cf002edbc5927079f51bebde428d601f723.tar.gz |
Merge branch 'irq/for-gpio' into irq/core
Merge the request/release callbacks which are in a separate branch for
consumption by the gpio folks.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/xtensa/include/asm/traps.h')
-rw-r--r-- | arch/xtensa/include/asm/traps.h | 44 |
1 files changed, 28 insertions, 16 deletions
diff --git a/arch/xtensa/include/asm/traps.h b/arch/xtensa/include/asm/traps.h index 8c194f6..677bfcf 100644 --- a/arch/xtensa/include/asm/traps.h +++ b/arch/xtensa/include/asm/traps.h @@ -23,25 +23,37 @@ void secondary_trap_init(void); static inline void spill_registers(void) { - +#if XCHAL_NUM_AREGS > 16 __asm__ __volatile__ ( - "movi a14, "__stringify((1 << PS_EXCM_BIT) | LOCKLEVEL)"\n\t" - "mov a12, a0\n\t" - "rsr a13, sar\n\t" - "xsr a14, ps\n\t" - "movi a0, _spill_registers\n\t" - "rsync\n\t" - "callx0 a0\n\t" - "mov a0, a12\n\t" - "wsr a13, sar\n\t" - "wsr a14, ps\n\t" - : : -#if defined(CONFIG_FRAME_POINTER) - : "a2", "a3", "a4", "a11", "a12", "a13", "a14", "a15", + " call12 1f\n" + " _j 2f\n" + " retw\n" + " .align 4\n" + "1:\n" + " _entry a1, 48\n" + " addi a12, a0, 3\n" +#if XCHAL_NUM_AREGS > 32 + " .rept (" __stringify(XCHAL_NUM_AREGS) " - 32) / 12\n" + " _entry a1, 48\n" + " mov a12, a0\n" + " .endr\n" +#endif + " _entry a1, 48\n" +#if XCHAL_NUM_AREGS % 12 == 0 + " mov a8, a8\n" +#elif XCHAL_NUM_AREGS % 12 == 4 + " mov a12, a12\n" +#elif XCHAL_NUM_AREGS % 12 == 8 + " mov a4, a4\n" +#endif + " retw\n" + "2:\n" + : : : "a12", "a13", "memory"); #else - : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", + __asm__ __volatile__ ( + " mov a12, a12\n" + : : : "memory"); #endif - "memory"); } #endif /* _XTENSA_TRAPS_H */ |