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author | Glauber de Oliveira Costa <gcosta@redhat.com> | 2007-07-21 17:11:16 +0200 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-21 18:37:12 -0700 |
commit | 99253b8e734a7a773c0e4bedd7d8d1847c98c538 (patch) | |
tree | ed832a0d85ca73f51d28c4f279ebfcf8bd96dccb /arch/x86_64 | |
parent | d24e399763f9e91cc03e4e351d75f6231d5ed4f2 (diff) | |
download | op-kernel-dev-99253b8e734a7a773c0e4bedd7d8d1847c98c538.zip op-kernel-dev-99253b8e734a7a773c0e4bedd7d8d1847c98c538.tar.gz |
x86_64: Move functions declarations to header file
Some interrupt entry points are currently defined in i8259.c They probably
belong in a header. Right now, their only user is init_IRQ, justifying
their declaration in-file. But when virtualization comes in, we may be
interested in using that functions in late initializations.
Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/x86_64')
-rw-r--r-- | arch/x86_64/kernel/i8259.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c index 4b32665..948cae6 100644 --- a/arch/x86_64/kernel/i8259.c +++ b/arch/x86_64/kernel/i8259.c @@ -444,24 +444,6 @@ void __init init_ISA_irqs (void) } } -void apic_timer_interrupt(void); -void spurious_interrupt(void); -void error_interrupt(void); -void reschedule_interrupt(void); -void call_function_interrupt(void); -void irq_move_cleanup_interrupt(void); -void invalidate_interrupt0(void); -void invalidate_interrupt1(void); -void invalidate_interrupt2(void); -void invalidate_interrupt3(void); -void invalidate_interrupt4(void); -void invalidate_interrupt5(void); -void invalidate_interrupt6(void); -void invalidate_interrupt7(void); -void thermal_interrupt(void); -void threshold_interrupt(void); -void i8254_timer_resume(void); - static void setup_timer_hardware(void) { outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ |