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| author | Cliff Wickman <cpw@sgi.com> | 2008-08-19 12:51:59 -0500 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-08-20 12:36:03 +0200 |
| commit | 99dd8713306a89f3e106143581244e550e00a644 (patch) | |
| tree | 32581d2ce9374b1b6db33a2eec0a5c0bf626b1dc /arch/x86 | |
| parent | 80c5e73d6028e0f03ab0c70e7c4cbf98ac2e0c43 (diff) | |
| download | op-kernel-dev-99dd8713306a89f3e106143581244e550e00a644.zip op-kernel-dev-99dd8713306a89f3e106143581244e550e00a644.tar.gz | |
x86, SGI UV: hardcode the TLB flush interrupt system vector
The UV TLB shootdown mechanism needs a system interrupt vector.
Its vector had been hardcoded as 200, but needs to moved to the reserved
system vector range so that it does not collide with some device vector.
This is still temporary until dynamic system IRQ allocation is provided.
But it will be needed when real UV hardware becomes available and runs 2.6.27.
Signed-off-by: Cliff Wickman <cpw@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/tlb_uv.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c index d0fbb77..8b8c0d6 100644 --- a/arch/x86/kernel/tlb_uv.c +++ b/arch/x86/kernel/tlb_uv.c @@ -17,6 +17,7 @@ #include <asm/genapic.h> #include <asm/idle.h> #include <asm/tsc.h> +#include <asm/irq_vectors.h> #include <mach_apic.h> @@ -783,7 +784,7 @@ static int __init uv_bau_init(void) uv_init_blade(blade, node, cur_cpu); cur_cpu += uv_blade_nr_possible_cpus(blade); } - set_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1); + alloc_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1); uv_enable_timeouts(); return 0; |
