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| author | Eric W. Biederman <ebiederm@xmission.com> | 2010-03-30 01:07:13 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2010-05-04 13:35:08 -0700 |
| commit | d464207c4fdd70c2a0febd4f9c58206fa915bb36 (patch) | |
| tree | f0fe275977391a5b7bb7edd839fd15c9b693bd5d /arch/x86 | |
| parent | 7716a5c4ff5f1f3dc5e9edcab125cbf7fceef0af (diff) | |
| download | op-kernel-dev-d464207c4fdd70c2a0febd4f9c58206fa915bb36.zip op-kernel-dev-d464207c4fdd70c2a0febd4f9c58206fa915bb36.tar.gz | |
x86, ioapic: Optimize pin_2_irq
Now that all ioapics have valid gsi_base values use this to
accellerate pin_2_irq. In the case of acpi this also ensures
that pin_2_irq will compute the same irq value for an ioapic
pin as acpi will.
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
LKML-Reference: <1269936436-7039-12-git-send-email-ebiederm@xmission.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index dae9240..0d35f46 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1019,7 +1019,7 @@ static inline int irq_trigger(int idx) int (*ioapic_renumber_irq)(int ioapic, int irq); static int pin_2_irq(int idx, int apic, int pin) { - int irq, i; + int irq; int bus = mp_irqs[idx].srcbus; /* @@ -1031,18 +1031,13 @@ static int pin_2_irq(int idx, int apic, int pin) if (test_bit(bus, mp_bus_not_pci)) { irq = mp_irqs[idx].srcbusirq; } else { - /* - * PCI IRQs are mapped in order - */ - i = irq = 0; - while (i < apic) - irq += nr_ioapic_registers[i++]; - irq += pin; + u32 gsi = mp_gsi_routing[apic].gsi_base + pin; /* * For MPS mode, so far only needed by ES7000 platform */ if (ioapic_renumber_irq) - irq = ioapic_renumber_irq(apic, irq); + gsi = ioapic_renumber_irq(apic, gsi); + irq = gsi; } #ifdef CONFIG_X86_32 |
