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authorH. Peter Anvin <hpa@zytor.com>2012-06-07 13:32:04 -0700
committerH. Peter Anvin <hpa@zytor.com>2012-06-07 13:32:04 -0700
commit715c85b1fc824e9cd0ea07d6ceb80d2262f32e90 (patch)
tree7371367ce975c575b844eddd63daed92d66830a4 /arch/x86/vdso
parent2c929ce6f1ed1302be225512b433e6a6554f71a4 (diff)
downloadop-kernel-dev-715c85b1fc824e9cd0ea07d6ceb80d2262f32e90.zip
op-kernel-dev-715c85b1fc824e9cd0ea07d6ceb80d2262f32e90.tar.gz
x86, cpu: Rename checking_wrmsrl() to wrmsrl_safe()
Rename checking_wrmsrl() to wrmsrl_safe(), to match the naming convention used by all the other MSR access functions/macros. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/vdso')
-rw-r--r--arch/x86/vdso/vdso32-setup.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c
index 66e6d93..0faad64 100644
--- a/arch/x86/vdso/vdso32-setup.c
+++ b/arch/x86/vdso/vdso32-setup.c
@@ -205,9 +205,9 @@ void syscall32_cpu_init(void)
{
/* Load these always in case some future AMD CPU supports
SYSENTER from compat mode too. */
- checking_wrmsrl(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
- checking_wrmsrl(MSR_IA32_SYSENTER_ESP, 0ULL);
- checking_wrmsrl(MSR_IA32_SYSENTER_EIP, (u64)ia32_sysenter_target);
+ wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
+ wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
+ wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)ia32_sysenter_target);
wrmsrl(MSR_CSTAR, ia32_cstar_target);
}
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