diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2012-10-01 14:34:42 -0700 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2012-10-02 08:42:31 +0200 |
| commit | 1396adc3c2bdc556d4cdd1cf107aa0b6d59fbb1e (patch) | |
| tree | 7fc9ec52083551c3b1d5ea5937fa6e583ad32e07 /arch/x86/realmode | |
| parent | b2cc2a074de75671bbed5e2dda67a9252ef353ea (diff) | |
| download | op-kernel-dev-1396adc3c2bdc556d4cdd1cf107aa0b6d59fbb1e.zip op-kernel-dev-1396adc3c2bdc556d4cdd1cf107aa0b6d59fbb1e.tar.gz | |
x86, suspend: Correct the restore of CR4, EFER; skip computing EFLAGS.ID
The patch:
73201dbe x86, suspend: On wakeup always initialize cr4 and EFER
... was incorrectly committed in an intermediate (unfinished) form.
- We need to test CF, not ZF, for a bit test with btl.
- We don't actually need to compute the existence of EFLAGS.ID,
since we set a flag at suspend time if CR4 should be restored.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Link: http://lkml.kernel.org/r/1348529239-17943-1-git-send-email-hpa@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/realmode')
| -rw-r--r-- | arch/x86/realmode/rm/wakeup_asm.S | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/arch/x86/realmode/rm/wakeup_asm.S b/arch/x86/realmode/rm/wakeup_asm.S index e56479e..9e7e147 100644 --- a/arch/x86/realmode/rm/wakeup_asm.S +++ b/arch/x86/realmode/rm/wakeup_asm.S @@ -74,18 +74,9 @@ ENTRY(wakeup_start) lidtl wakeup_idt - /* Clear the EFLAGS but remember if we have EFLAGS.ID */ - movl $X86_EFLAGS_ID, %ecx - pushl %ecx - popfl - pushfl - popl %edi + /* Clear the EFLAGS */ pushl $0 popfl - pushfl - popl %edx - xorl %edx, %edi - andl %ecx, %edi /* %edi is zero iff CPUID & %cr4 are missing */ /* Check header signature... */ movl signature, %eax @@ -120,12 +111,12 @@ ENTRY(wakeup_start) movl %eax, %cr3 btl $WAKEUP_BEHAVIOR_RESTORE_CR4, %edi - jz 1f + jnc 1f movl pmode_cr4, %eax movl %eax, %cr4 1: btl $WAKEUP_BEHAVIOR_RESTORE_EFER, %edi - jz 1f + jnc 1f movl pmode_efer, %eax movl pmode_efer + 4, %edx movl $MSR_EFER, %ecx |
