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| author | Jacob Pan <jacob.jun.pan@linux.intel.com> | 2011-11-16 16:07:22 +0000 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2011-12-05 12:42:11 +0100 |
| commit | 48bc5562103412590e4487b666b49e7b6c84ba44 (patch) | |
| tree | ab849bf6ea7f764781184d80bd3e8ae1b32959af /arch/x86/platform | |
| parent | 6be30bb7d7504ec687a65c9bbdae8d1d2f8eaa19 (diff) | |
| download | op-kernel-dev-48bc5562103412590e4487b666b49e7b6c84ba44.zip op-kernel-dev-48bc5562103412590e4487b666b49e7b6c84ba44.tar.gz | |
x86,mrst: Power control commands update
On the Intel MID devices SCU commands are issued to manage power
off and the like. We need to issue different ones for
non-Lincroft based devices.
Signed-off-by: Alek Du <alek.du@intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/platform')
| -rw-r--r-- | arch/x86/platform/mrst/mrst.c | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c index b1489a0..fedc3d7 100644 --- a/arch/x86/platform/mrst/mrst.c +++ b/arch/x86/platform/mrst/mrst.c @@ -76,6 +76,20 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX]; EXPORT_SYMBOL_GPL(sfi_mrtc_array); int sfi_mrtc_num; +static void mrst_power_off(void) +{ + if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) + intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 1); +} + +static void mrst_reboot(void) +{ + if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) + intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0); + else + intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0); +} + /* parse all the mtimer info to a static mtimer array */ static int __init sfi_parse_mtmr(struct sfi_table_header *table) { @@ -265,17 +279,6 @@ static int mrst_i8042_detect(void) return 0; } -/* Reboot and power off are handled by the SCU on a MID device */ -static void mrst_power_off(void) -{ - intel_scu_ipc_simple_command(0xf1, 1); -} - -static void mrst_reboot(void) -{ - intel_scu_ipc_simple_command(0xf1, 0); -} - /* * Moorestown does not have external NMI source nor port 0x61 to report * NMI status. The possible NMI sources are from pmu as a result of NMI |
