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author | Bjorn Helgaas <bjorn.helgaas@hp.com> | 2010-03-11 12:20:06 -0700 |
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committer | Len Brown <len.brown@intel.com> | 2010-04-04 00:29:41 -0400 |
commit | 6ad95513d60096b569e4e4bd721420f03b57e4d4 (patch) | |
tree | 1029d5804adc51eb3f5c0aed56ef0fd00ae2042f /arch/x86/pci | |
parent | 2eaa9cfdf33b8d7fb7aff27792192e0019ae8fc6 (diff) | |
download | op-kernel-dev-6ad95513d60096b569e4e4bd721420f03b57e4d4.zip op-kernel-dev-6ad95513d60096b569e4e4bd721420f03b57e4d4.tar.gz |
ACPI: pci_root: save downstream bus range
Previously, we only saved the root bus number, i.e., the beginning of the
downstream bus range. We now support IORESOURCE_BUS resources, so this
patch uses that to keep track of both the beginning and the end of the
downstream bus range.
It's important to know both the beginning and the end for supporting _CBA
(see PCI Firmware spec, rev 3.0, sec 4.1.3) and so we know the limits for
any possible PCI bus renumbering (we can't renumber downstream buses to be
outside the bus number range claimed by the host bridge).
It's clear from the spec that the bus range is supposed to be in _CRS, but
if we don't find it there, we'll assume [_BBN - 0xFF] or [0 - 0xFF].
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/x86/pci')
0 files changed, 0 insertions, 0 deletions