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authorRobert Richter <robert.richter@amd.com>2008-07-22 21:08:56 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-26 11:48:05 +0200
commit7939d2bf7e30353d40d14f967b7fe2b2a7be5bd9 (patch)
treea2b4224019e6c9c6ea4f39aba2363c23c2d7b89d /arch/x86/oprofile
parent56784f11df473b4c1d9d0e37777fd7c0b77b6bca (diff)
downloadop-kernel-dev-7939d2bf7e30353d40d14f967b7fe2b2a7be5bd9.zip
op-kernel-dev-7939d2bf7e30353d40d14f967b7fe2b2a7be5bd9.tar.gz
x86/oprofile: separating the IBS handler
Signed-off-by: Robert Richter <robert.richter@amd.com> Cc: oprofile-list <oprofile-list@lists.sourceforge.net> Cc: Barry Kasindorf <barry.kasindorf@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/oprofile')
-rw-r--r--arch/x86/oprofile/op_model_athlon.c45
1 files changed, 28 insertions, 17 deletions
diff --git a/arch/x86/oprofile/op_model_athlon.c b/arch/x86/oprofile/op_model_athlon.c
index 229e0b4..a2c8e2e 100644
--- a/arch/x86/oprofile/op_model_athlon.c
+++ b/arch/x86/oprofile/op_model_athlon.c
@@ -195,27 +195,18 @@ static void op_amd_setup_ctrs(struct op_msrs const * const msrs)
}
}
-
-static int op_amd_check_ctrs(struct pt_regs * const regs,
- struct op_msrs const * const msrs)
+static inline int
+op_amd_handle_ibs(struct pt_regs * const regs,
+ struct op_msrs const * const msrs)
{
unsigned int low, high;
- int i;
struct ibs_fetch_sample ibs_fetch;
struct ibs_op_sample ibs_op;
- for (i = 0 ; i < NUM_COUNTERS; ++i) {
- if (!reset_value[i])
- continue;
- CTR_READ(low, high, msrs, i);
- if (CTR_OVERFLOWED(low)) {
- oprofile_add_sample(regs, i);
- CTR_WRITE(reset_value[i], msrs, i);
- }
- }
+ if (!ibs_allowed)
+ return 1;
- /*If AMD and IBS is available */
- if (ibs_allowed && ibs_config.fetch_enabled) {
+ if (ibs_config.fetch_enabled) {
rdmsr(MSR_AMD64_IBSFETCHCTL, low, high);
if (high & IBS_FETCH_VALID_BIT) {
ibs_fetch.ibs_fetch_ctl_high = high;
@@ -240,7 +231,7 @@ static int op_amd_check_ctrs(struct pt_regs * const regs,
}
}
- if (ibs_allowed && ibs_config.op_enabled) {
+ if (ibs_config.op_enabled) {
rdmsr(MSR_AMD64_IBSOPCTL, low, high);
if (low & IBS_OP_VALID_BIT) {
rdmsr(MSR_AMD64_IBSOPRIP, low, high);
@@ -273,10 +264,30 @@ static int op_amd_check_ctrs(struct pt_regs * const regs,
}
}
- /* See op_model_ppro.c */
return 1;
}
+static int op_amd_check_ctrs(struct pt_regs * const regs,
+ struct op_msrs const * const msrs)
+{
+ unsigned int low, high;
+ int i;
+
+ for (i = 0 ; i < NUM_COUNTERS; ++i) {
+ if (!reset_value[i])
+ continue;
+ CTR_READ(low, high, msrs, i);
+ if (CTR_OVERFLOWED(low)) {
+ oprofile_add_sample(regs, i);
+ CTR_WRITE(reset_value[i], msrs, i);
+ }
+ }
+
+ op_amd_handle_ibs(regs, msrs);
+
+ /* See op_model_ppro.c */
+ return 1;
+}
static void op_amd_start(struct op_msrs const * const msrs)
{
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