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author | Denys Vlasenko <dvlasenk@redhat.com> | 2015-09-18 16:53:30 +0200 |
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committer | Ingo Molnar <mingo@kernel.org> | 2015-09-20 10:19:53 +0200 |
commit | 9a9d8642d03a7512f78cbe7ed6a2011fad3cbca3 (patch) | |
tree | d6d27f303c77fdf8b4b115cc8c0cce2acee8c42d /arch/x86/math-emu/fpu_entry.c | |
parent | b8e4a910e576961009a87d07f6b7eff67c5c2e34 (diff) | |
download | op-kernel-dev-9a9d8642d03a7512f78cbe7ed6a2011fad3cbca3.zip op-kernel-dev-9a9d8642d03a7512f78cbe7ed6a2011fad3cbca3.tar.gz |
x86/fpu/math-emu: Add support for FCMOVcc insns
Run-tested by booting with "no387 nofxsr" and running test
program:
[RUN] Testing fcmovCC instructions
[OK] fcmovCC
Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Link: http://lkml.kernel.org/r/1442588010-20055-3-git-send-email-dvlasenk@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/math-emu/fpu_entry.c')
-rw-r--r-- | arch/x86/math-emu/fpu_entry.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/x86/math-emu/fpu_entry.c b/arch/x86/math-emu/fpu_entry.c index 4ecf683..e945fed 100644 --- a/arch/x86/math-emu/fpu_entry.c +++ b/arch/x86/math-emu/fpu_entry.c @@ -40,7 +40,7 @@ #define __BAD__ FPU_illegal /* Illegal on an 80486, causes SIGILL */ -/* f(u)comi(p) are enabled if CPUID(1).EDX(15) "cmov" is set */ +/* fcmovCC and f(u)comi(p) are enabled if CPUID(1).EDX(15) "cmov" is set */ /* WARNING: "u" entries are not documented by Intel in their 80486 manual and may not work on FPU clones or later Intel FPUs. @@ -49,13 +49,13 @@ static FUNC const st_instr_table[64] = { /* Opcode: d8 d9 da db */ /* dc dd de df */ -/* c0..7 */ fadd__, fld_i_, __BAD__, __BAD__, +/* c0..7 */ fadd__, fld_i_, fcmovb, fcmovnb, /* c0..7 */ fadd_i, ffree_, faddp_, ffreep,/*u*/ -/* c8..f */ fmul__, fxch_i, __BAD__, __BAD__, +/* c8..f */ fmul__, fxch_i, fcmove, fcmovne, /* c8..f */ fmul_i, fxch_i,/*u*/ fmulp_, fxch_i,/*u*/ -/* d0..7 */ fcom_st, fp_nop, __BAD__, __BAD__, +/* d0..7 */ fcom_st, fp_nop, fcmovbe, fcmovnbe, /* d0..7 */ fcom_st,/*u*/ fst_i_, fcompst,/*u*/ fstp_i,/*u*/ -/* d8..f */ fcompst, fstp_i,/*u*/ __BAD__, __BAD__, +/* d8..f */ fcompst, fstp_i,/*u*/ fcmovu, fcmovnu, /* d8..f */ fcompst,/*u*/ fstp_i, fcompp, fstp_i,/*u*/ /* e0..7 */ fsub__, FPU_etc, __BAD__, finit_, /* e0..7 */ fsubri, fucom_, fsubrp, fstsw_, @@ -80,10 +80,10 @@ static FUNC const st_instr_table[64] = { static u_char const type_table[64] = { /* Opcode: d8 d9 da db dc dd de df */ -/* c0..7 */ _REGI_, _NONE_, _null_, _null_, _REGIi, _REGi_, _REGIp, _REGi_, -/* c8..f */ _REGI_, _REGIn, _null_, _null_, _REGIi, _REGI_, _REGIp, _REGI_, -/* d0..7 */ _REGIc, _NONE_, _null_, _null_, _REGIc, _REG0_, _REGIc, _REG0_, -/* d8..f */ _REGIc, _REG0_, _null_, _null_, _REGIc, _REG0_, _REGIc, _REG0_, +/* c0..7 */ _REGI_, _NONE_, _REGIn, _REGIn, _REGIi, _REGi_, _REGIp, _REGi_, +/* c8..f */ _REGI_, _REGIn, _REGIn, _REGIn, _REGIi, _REGI_, _REGIp, _REGI_, +/* d0..7 */ _REGIc, _NONE_, _REGIn, _REGIn, _REGIc, _REG0_, _REGIc, _REG0_, +/* d8..f */ _REGIc, _REG0_, _REGIn, _REGIn, _REGIc, _REG0_, _REGIc, _REG0_, /* e0..7 */ _REGI_, _NONE_, _null_, _NONE_, _REGIi, _REGIc, _REGIp, _NONE_, /* e8..f */ _REGI_, _NONE_, _REGIc, _REGIc, _REGIi, _REGIc, _REGIp, _REGIc, /* f0..7 */ _REGI_, _NONE_, _null_, _REGIc, _REGIi, _null_, _REGIp, _REGIc, |