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author | Yinghai Lu <yhlu.kernel@gmail.com> | 2008-08-19 20:50:28 -0700 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-10-16 16:52:53 +0200 |
commit | 497c9a195db918d3f035e8cb3021e5d4d035516e (patch) | |
tree | 73df8764a812f2d6d2bd81d6a1d671008a0d212b /arch/x86/mach-generic/numaq.c | |
parent | 199751d715bba5b469ea22adadc68a4166bfa4f5 (diff) | |
download | op-kernel-dev-497c9a195db918d3f035e8cb3021e5d4d035516e.zip op-kernel-dev-497c9a195db918d3f035e8cb3021e5d4d035516e.tar.gz |
x86: make 32bit support per_cpu vector
so we can merge io_apic_32.c and io_apic_64.c
v2: Use cpu_online_map as target cpus for bigsmp, just like 64-bit is doing.
Also remove some unused TARGET_CPUS macro.
v3: need to check if desc is null in smp_irq_move_cleanup
also migration needs to reset vector too, so copy __target_IO_APIC_irq
from 64bit.
(the duplication will go away once the two files are unified.)
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/mach-generic/numaq.c')
-rw-r--r-- | arch/x86/mach-generic/numaq.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c index 8cf5839..71a309b 100644 --- a/arch/x86/mach-generic/numaq.c +++ b/arch/x86/mach-generic/numaq.c @@ -38,4 +38,18 @@ static int acpi_madt_oem_check(char *oem_id, char *oem_table_id) return 0; } +static cpumask_t vector_allocation_domain(int cpu) +{ + /* Careful. Some cpus do not strictly honor the set of cpus + * specified in the interrupt destination when using lowest + * priority interrupt delivery mode. + * + * In particular there was a hyperthreading cpu observed to + * deliver interrupts to the wrong hyperthread when only one + * hyperthread was specified in the interrupt desitination. + */ + cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; + return domain; +} + struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq); |