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| author | Paolo Bonzini <pbonzini@redhat.com> | 2014-09-02 13:24:12 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2014-09-03 10:04:11 +0200 |
| commit | a0c0feb57992c5caed170feab8a68c51306eb7c3 (patch) | |
| tree | 03865eccb27cbc1a2604d6e83ae3f8ecff9b355c /arch/x86/kvm/paging_tmpl.h | |
| parent | d143148383d0395539073dd6c2f25ddf6656bdcc (diff) | |
| download | op-kernel-dev-a0c0feb57992c5caed170feab8a68c51306eb7c3.zip op-kernel-dev-a0c0feb57992c5caed170feab8a68c51306eb7c3.tar.gz | |
KVM: x86: reserve bit 8 of non-leaf PDPEs and PML4Es in 64-bit mode on AMD
Bit 8 would be the "global" bit, which does not quite make sense for non-leaf
page table entries. Intel ignores it; AMD ignores it in PDEs, but reserves it
in PDPEs and PML4Es. The SVM test is relying on this behavior, so enforce it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/paging_tmpl.h')
0 files changed, 0 insertions, 0 deletions
