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authorXiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>2014-04-17 17:06:15 +0800
committerMarcelo Tosatti <mtosatti@redhat.com>2014-04-23 17:49:51 -0300
commit7f31c9595e3c87f68dc54b3269e900f3017ed405 (patch)
tree8545bf72ce7f938141a4f90c0b8c8fdb7c90c77f /arch/x86/kvm/mmu.h
parentc126d94f2c90ed9daee24a94f1c67aff7e9bf387 (diff)
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KVM: MMU: flush tlb if the spte can be locklessly modified
Relax the tlb flush condition since we will write-protect the spte out of mmu lock. Note lockless write-protection only marks the writable spte to readonly and the spte can be writable only if both SPTE_HOST_WRITEABLE and SPTE_MMU_WRITEABLE are set (that are tested by spte_is_locklessly_modifiable) This patch is used to avoid this kind of race: VCPU 0 VCPU 1 lockless wirte protection: set spte.w = 0 lock mmu-lock write protection the spte to sync shadow page, see spte.w = 0, then without flush tlb unlock mmu-lock !!! At this point, the shadow page can still be writable due to the corrupt tlb entry Flush all TLB Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'arch/x86/kvm/mmu.h')
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