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author | Wanpeng Li <wanpeng.li@hotmail.com> | 2017-10-05 03:53:51 -0700 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2017-10-12 14:01:50 +0200 |
commit | c69518c86be5000bf4d8eb0e0d279d40779d2a18 (patch) | |
tree | f2094d7182195ee91aa6c62d135f048a83e58908 /arch/x86/kvm/lapic.c | |
parent | 9cc5fbbb8ca2178d94f2eeeb2ce675293a3f8ae2 (diff) | |
download | op-kernel-dev-c69518c86be5000bf4d8eb0e0d279d40779d2a18.zip op-kernel-dev-c69518c86be5000bf4d8eb0e0d279d40779d2a18.tar.gz |
KVM: LAPIC: Fix lapic timer mode transition
SDM 10.5.4.1 TSC-Deadline Mode mentioned that "Transitioning between TSC-Deadline
mode and other timer modes also disarms the timer". So the APIC Timer Initial Count
Register for one-shot/periodic mode should be reset. This patch do it.
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com>
[Removed unnecessary definition of APIC_LVT_TIMER_MASK.]
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Diffstat (limited to 'arch/x86/kvm/lapic.c')
-rw-r--r-- | arch/x86/kvm/lapic.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 69c5612..6723e2c 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1307,6 +1307,9 @@ static void apic_update_lvtt(struct kvm_lapic *apic) apic->lapic_timer.timer_mode_mask; if (apic->lapic_timer.timer_mode != timer_mode) { + if (apic_lvtt_tscdeadline(apic) != (timer_mode == + APIC_LVT_TIMER_TSCDEADLINE)) + kvm_lapic_set_reg(apic, APIC_TMICT, 0); apic->lapic_timer.timer_mode = timer_mode; hrtimer_cancel(&apic->lapic_timer.timer); } |