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author | Yang Zhang <yang.z.zhang@Intel.com> | 2013-04-11 19:25:14 +0800 |
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committer | Marcelo Tosatti <mtosatti@redhat.com> | 2013-04-16 16:32:40 -0300 |
commit | cf9e65b773394c5ad8fa7455c43268bc8ec2109f (patch) | |
tree | dea4e116da3ecc13c8b6383ec2145a73480d66f0 /arch/x86/kvm/lapic.c | |
parent | 3d81bc7e96d6bca0b8f8b7d1bf6ea72caa3aac57 (diff) | |
download | op-kernel-dev-cf9e65b773394c5ad8fa7455c43268bc8ec2109f.zip op-kernel-dev-cf9e65b773394c5ad8fa7455c43268bc8ec2109f.tar.gz |
KVM: Set TMR when programming ioapic entry
We already know the trigger mode of a given interrupt when programming
the ioapice entry. So it's not necessary to set it in each interrupt
delivery.
Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
Reviewed-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'arch/x86/kvm/lapic.c')
-rw-r--r-- | arch/x86/kvm/lapic.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 34a8ca8..d197579 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -468,6 +468,15 @@ static inline int apic_find_highest_isr(struct kvm_lapic *apic) return result; } +void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr) +{ + struct kvm_lapic *apic = vcpu->arch.apic; + int i; + + for (i = 0; i < 8; i++) + apic_set_reg(apic, APIC_TMR + 0x10 * i, tmr[i]); +} + static void apic_update_ppr(struct kvm_lapic *apic) { u32 tpr, isrv, ppr, old_ppr; @@ -661,12 +670,6 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, if (dest_map) __set_bit(vcpu->vcpu_id, dest_map); - if (trig_mode) { - apic_debug("level trig mode for vector %d", vector); - apic_set_vector(vector, apic->regs + APIC_TMR); - } else - apic_clear_vector(vector, apic->regs + APIC_TMR); - result = !apic_test_and_set_irr(vector, apic); trace_kvm_apic_accept_irq(vcpu->vcpu_id, delivery_mode, trig_mode, vector, !result); |