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| author | Avi Kivity <avi@redhat.com> | 2011-07-28 11:36:17 +0300 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2011-09-25 19:18:01 +0300 |
| commit | e4e517b4be019787ada4cbbce2f04570c21b0cbd (patch) | |
| tree | 130dcb08868586e46ad6ad488dd4ba0e219f90c2 /arch/x86/kvm/kvm_cache_regs.h | |
| parent | cf3ace79c065d65e9636f719a9df1382725410e3 (diff) | |
| download | op-kernel-dev-e4e517b4be019787ada4cbbce2f04570c21b0cbd.zip op-kernel-dev-e4e517b4be019787ada4cbbce2f04570c21b0cbd.tar.gz | |
KVM: MMU: Do not unconditionally read PDPTE from guest memory
Architecturally, PDPTEs are cached in the PDPTRs when CR3 is reloaded.
On SVM, it is not possible to implement this, but on VMX this is possible
and was indeed implemented until nested SVM changed this to unconditionally
read PDPTEs dynamically. This has noticable impact when running PAE guests.
Fix by changing the MMU to read PDPTRs from the cache, falling back to
reading from memory for the nested MMU.
Signed-off-by: Avi Kivity <avi@redhat.com>
Tested-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'arch/x86/kvm/kvm_cache_regs.h')
| -rw-r--r-- | arch/x86/kvm/kvm_cache_regs.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h index 3377d53..544076c 100644 --- a/arch/x86/kvm/kvm_cache_regs.h +++ b/arch/x86/kvm/kvm_cache_regs.h @@ -45,13 +45,6 @@ static inline u64 kvm_pdptr_read(struct kvm_vcpu *vcpu, int index) return vcpu->arch.walk_mmu->pdptrs[index]; } -static inline u64 kvm_pdptr_read_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, int index) -{ - load_pdptrs(vcpu, mmu, mmu->get_cr3(vcpu)); - - return mmu->pdptrs[index]; -} - static inline ulong kvm_read_cr0_bits(struct kvm_vcpu *vcpu, ulong mask) { ulong tmask = mask & KVM_POSSIBLE_CR0_GUEST_BITS; |
