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| author | Suresh Siddha <suresh.b.siddha@intel.com> | 2008-07-10 11:16:58 -0700 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-12 08:45:06 +0200 |
| commit | 6e1cb38a2aef7680975e71f23de187859ee8b158 (patch) | |
| tree | 4044df869c6314dcdac700f3fdd3cc256cc9d3a7 /arch/x86/kernel/mpparse.c | |
| parent | 75c46fa61bc5b4ccd20a168ff325c58771248fcd (diff) | |
| download | op-kernel-dev-6e1cb38a2aef7680975e71f23de187859ee8b158.zip op-kernel-dev-6e1cb38a2aef7680975e71f23de187859ee8b158.tar.gz | |
x64, x2apic/intr-remap: add x2apic support, including enabling interrupt-remapping
x2apic support. Interrupt-remapping must be enabled before enabling x2apic,
this is needed to ensure that IO interrupts continue to work properly after the
cpu mode is changed to x2apic(which uses 32bit extended physical/cluster
apic id).
On systems where apicid's are > 255, BIOS can handover the control to OS in
x2apic mode. Or if the OS handover was in legacy xapic mode, check
if it is capable of x2apic mode. And if we succeed in enabling
Interrupt-remapping, then we can enable x2apic mode in the CPU.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: akpm@linux-foundation.org
Cc: arjan@linux.intel.com
Cc: andi@firstfloor.org
Cc: ebiederm@xmission.com
Cc: jbarnes@virtuousgeek.org
Cc: steiner@sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/mpparse.c')
| -rw-r--r-- | arch/x86/kernel/mpparse.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index 3b25e49..70e1f3e 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -545,7 +545,9 @@ static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early) generic_bigsmp_probe(); #endif +#ifdef CONFIG_X86_32 setup_apic_routing(); +#endif if (!num_processors) printk(KERN_ERR "MPTABLE: no processors registered!\n"); return num_processors; |
