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authorAndreas Herrmann <herrmann.der.user@googlemail.com>2009-10-27 11:01:38 +0100
committerIngo Molnar <mingo@elte.hu>2009-10-27 14:54:21 +0100
commit6f9b41006af1bc489030f84ee247abc0df1edccd (patch)
tree94bbecb0774d1a82dfb87b3db64c876e4693bf0d /arch/x86/kernel/irq_32.c
parentf88f2b4fdb1e098433ad2b005b6f7353f7268ce1 (diff)
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x86, apic: Clear APIC Timer Initial Count Register on shutdown
Commit a98f8fd24fb24fcb9a359553e64dd6aac5cf4279 (x86: apic reset counter on shutdown) set the counter to max to avoid spurious interrupts when the timer is re-enabled. (In theory) you'll still get a spurious interrupt if spending more than 344 seconds with this interrupt disabled and then unmasking it. The right thing to do is to clear the register. This disables the interrupt from happening (at least it does on AMD hardware). Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> LKML-Reference: <20091027100138.GB30802@alberich.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/irq_32.c')
0 files changed, 0 insertions, 0 deletions
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