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| author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:55:21 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:55:21 -0700 |
| commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
| tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /arch/x86/kernel/cpu/perfctr-watchdog.c | |
| parent | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff) | |
| parent | 657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff) | |
| download | op-kernel-dev-bbb20089a3275a19e475dbc21320c3742e3ca423.zip op-kernel-dev-bbb20089a3275a19e475dbc21320c3742e3ca423.tar.gz | |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'arch/x86/kernel/cpu/perfctr-watchdog.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perfctr-watchdog.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c index f6c70a1..5c481f6 100644 --- a/arch/x86/kernel/cpu/perfctr-watchdog.c +++ b/arch/x86/kernel/cpu/perfctr-watchdog.c @@ -19,8 +19,8 @@ #include <linux/nmi.h> #include <linux/kprobes.h> -#include <asm/genapic.h> -#include <asm/intel_arch_perfmon.h> +#include <asm/apic.h> +#include <asm/perf_counter.h> struct nmi_watchdog_ctlblk { unsigned int cccr_msr; @@ -716,11 +716,15 @@ static void probe_nmi_watchdog(void) wd_ops = &k7_wd_ops; break; case X86_VENDOR_INTEL: - /* - * Work around Core Duo (Yonah) errata AE49 where perfctr1 - * doesn't have a working enable bit. + /* Work around where perfctr1 doesn't have a working enable + * bit as described in the following errata: + * AE49 Core Duo and Intel Core Solo 65 nm + * AN49 Intel Pentium Dual-Core + * AF49 Dual-Core Intel Xeon Processor LV */ - if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 14) { + if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 14) || + ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 15 && + boot_cpu_data.x86_mask == 4))) { intel_arch_wd_ops.perfctr = MSR_ARCH_PERFMON_PERFCTR0; intel_arch_wd_ops.evntsel = MSR_ARCH_PERFMON_EVENTSEL0; } |
