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author | Olof Johansson <olof@lixom.net> | 2012-09-05 15:35:48 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2012-09-05 15:35:48 -0700 |
commit | 1875962377574b4edb7b164001e3e341c25290d5 (patch) | |
tree | 374a5299403ec21e2d9a66a6548ce876a388b589 /arch/x86/kernel/cpu/perf_event_intel.c | |
parent | 5cbee140a28c2746449ae31e85738043ae4da927 (diff) | |
parent | c88a79a7789b2909ad1cf69ea2c9142030bbd6f4 (diff) | |
download | op-kernel-dev-1875962377574b4edb7b164001e3e341c25290d5.zip op-kernel-dev-1875962377574b4edb7b164001e3e341c25290d5.tar.gz |
Merge branch 'soc-core' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
* 'soc-core' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: mach-shmobile: Add compilation support for dtbs using 'make dtbs'
+ sync to 3.6-rc3
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel.c')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 3823669..7f2739e 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -1522,8 +1522,16 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr) arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL; arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask; arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask; + /* + * If PMU counter has PEBS enabled it is not enough to disable counter + * on a guest entry since PEBS memory write can overshoot guest entry + * and corrupt guest memory. Disabling PEBS solves the problem. + */ + arr[1].msr = MSR_IA32_PEBS_ENABLE; + arr[1].host = cpuc->pebs_enabled; + arr[1].guest = 0; - *nr = 1; + *nr = 2; return arr; } |