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author | Olof Johansson <olof@lixom.net> | 2012-09-05 15:35:48 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2012-09-05 15:35:48 -0700 |
commit | 1875962377574b4edb7b164001e3e341c25290d5 (patch) | |
tree | 374a5299403ec21e2d9a66a6548ce876a388b589 /arch/x86/kernel/cpu/perf_event.h | |
parent | 5cbee140a28c2746449ae31e85738043ae4da927 (diff) | |
parent | c88a79a7789b2909ad1cf69ea2c9142030bbd6f4 (diff) | |
download | op-kernel-dev-1875962377574b4edb7b164001e3e341c25290d5.zip op-kernel-dev-1875962377574b4edb7b164001e3e341c25290d5.tar.gz |
Merge branch 'soc-core' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
* 'soc-core' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: mach-shmobile: Add compilation support for dtbs using 'make dtbs'
+ sync to 3.6-rc3
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event.h')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h index 821d53b..6605a81 100644 --- a/arch/x86/kernel/cpu/perf_event.h +++ b/arch/x86/kernel/cpu/perf_event.h @@ -516,6 +516,26 @@ static inline bool kernel_ip(unsigned long ip) #endif } +/* + * Not all PMUs provide the right context information to place the reported IP + * into full context. Specifically segment registers are typically not + * supplied. + * + * Assuming the address is a linear address (it is for IBS), we fake the CS and + * vm86 mode using the known zero-based code segment and 'fix up' the registers + * to reflect this. + * + * Intel PEBS/LBR appear to typically provide the effective address, nothing + * much we can do about that but pray and treat it like a linear address. + */ +static inline void set_linear_ip(struct pt_regs *regs, unsigned long ip) +{ + regs->cs = kernel_ip(ip) ? __KERNEL_CS : __USER_CS; + if (regs->flags & X86_VM_MASK) + regs->flags ^= (PERF_EFLAGS_VM | X86_VM_MASK); + regs->ip = ip; +} + #ifdef CONFIG_CPU_SUP_AMD int amd_pmu_init(void); |