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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-06 16:24:51 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-06 16:24:51 -0700 |
| commit | e8779776afbd5f2d5315cf48c4257ca7e9b250fb (patch) | |
| tree | a439733c6c71dd7d24ba65557159c30c2e49861a /arch/x86/kernel/cpu/mcheck/mce_intel.c | |
| parent | 3cf8ad3394b8675e92a35c438f22341197535531 (diff) | |
| parent | a2d7b0d4852536273b65d16fe179c65184fe5e2d (diff) | |
| download | op-kernel-dev-e8779776afbd5f2d5315cf48c4257ca7e9b250fb.zip op-kernel-dev-e8779776afbd5f2d5315cf48c4257ca7e9b250fb.tar.gz | |
Merge branch 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, mce: Use HW_ERR in MCE handler
x86, mce: Add HW_ERR printk prefix for hardware error logging
x86, mce: Fix MSR_IA32_MCI_CTL2 CMCI threshold setup
x86, mce: Rename MSR_IA32_MCx_CTL2 value
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/mce_intel.c')
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_intel.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c index 62b48e4..6fcd093 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_intel.c +++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c @@ -95,19 +95,20 @@ static void cmci_discover(int banks, int boot) rdmsrl(MSR_IA32_MCx_CTL2(i), val); /* Already owned by someone else? */ - if (val & CMCI_EN) { + if (val & MCI_CTL2_CMCI_EN) { if (test_and_clear_bit(i, owned) && !boot) print_update("SHD", &hdr, i); __clear_bit(i, __get_cpu_var(mce_poll_banks)); continue; } - val |= CMCI_EN | CMCI_THRESHOLD; + val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK; + val |= MCI_CTL2_CMCI_EN | CMCI_THRESHOLD; wrmsrl(MSR_IA32_MCx_CTL2(i), val); rdmsrl(MSR_IA32_MCx_CTL2(i), val); /* Did the enable bit stick? -- the bank supports CMCI */ - if (val & CMCI_EN) { + if (val & MCI_CTL2_CMCI_EN) { if (!test_and_set_bit(i, owned) && !boot) print_update("CMCI", &hdr, i); __clear_bit(i, __get_cpu_var(mce_poll_banks)); @@ -155,7 +156,7 @@ void cmci_clear(void) continue; /* Disable CMCI */ rdmsrl(MSR_IA32_MCx_CTL2(i), val); - val &= ~(CMCI_EN|CMCI_THRESHOLD_MASK); + val &= ~(MCI_CTL2_CMCI_EN|MCI_CTL2_CMCI_THRESHOLD_MASK); wrmsrl(MSR_IA32_MCx_CTL2(i), val); __clear_bit(i, __get_cpu_var(mce_banks_owned)); } |
