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author | Yinghai Lu <yhlu.kernel@gmail.com> | 2008-09-06 01:52:28 -0700 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-09-06 14:09:14 +0200 |
commit | e3224234717b4228c235cee401af89212f17a3a4 (patch) | |
tree | 10cc3810fa160e168fc29fb392929ab00a91bacb /arch/x86/kernel/cpu/amd.c | |
parent | 1b05d60d60e81c6594da8298107a05b506f01797 (diff) | |
download | op-kernel-dev-e3224234717b4228c235cee401af89212f17a3a4.zip op-kernel-dev-e3224234717b4228c235cee401af89212f17a3a4.tar.gz |
x86, cpu init: call early_init_xxx in init_xxx
so we:
1. could set some cap to ap
2. restore some cap after memset in identify_cpu for boot cpu
esp for CONSTANT_TSC this matters, as:
before this patch:
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow rep_good nopl pni monitor cx16 lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs
after this patch:
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl pni monitor cx16 lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs
so constant_tsc is back...
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/amd.c')
-rw-r--r-- | arch/x86/kernel/cpu/amd.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index e0ba2c7..c3175da 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -26,11 +26,8 @@ __asm__(".align 4\nvide: ret"); static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) { - if (cpuid_eax(0x80000000) >= 0x80000007) { - c->x86_power = cpuid_edx(0x80000007); - if (c->x86_power & (1<<8)) - set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); - } + if (c->x86_power & (1<<8)) + set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); /* Set MTRR capability flag if appropriate */ if (c->x86_model == 13 || c->x86_model == 9 || |