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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-04-05 19:05:28 +0300 |
|---|---|---|
| committer | Darren Hart (VMware) <dvhart@infradead.org> | 2017-04-13 10:16:04 -0700 |
| commit | d27a7e299daaf5d984cd671db99424660895586d (patch) | |
| tree | 4a33f58fa3494d6bc25fd6dd8f195e8d06a1adaf /arch/x86/include | |
| parent | 74bc77a3db0f68609c4c7641e010fd85e4c77a36 (diff) | |
| download | op-kernel-dev-d27a7e299daaf5d984cd671db99424660895586d.zip op-kernel-dev-d27a7e299daaf5d984cd671db99424660895586d.tar.gz | |
platform/x86: intel_scu_ipc: Introduce intel_scu_ipc_raw_command()
A new call to SCU intel_scu_ipc_raw_command() writes SPTR and DPTR
registers before sending a command.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/asm/intel_scu_ipc.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h index 4fb1d0a..81d3d87 100644 --- a/arch/x86/include/asm/intel_scu_ipc.h +++ b/arch/x86/include/asm/intel_scu_ipc.h @@ -3,6 +3,9 @@ #include <linux/notifier.h> +#define IPCMSG_INDIRECT_READ 0x02 +#define IPCMSG_INDIRECT_WRITE 0x05 + #define IPCMSG_COLD_OFF 0x80 /* Only for Tangier */ #define IPCMSG_WARM_RESET 0xF0 @@ -45,7 +48,10 @@ int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask); /* Issue commands to the SCU with or without data */ int intel_scu_ipc_simple_command(int cmd, int sub); int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, - u32 *out, int outlen); + u32 *out, int outlen); +int intel_scu_ipc_raw_command(int cmd, int sub, u8 *in, int inlen, + u32 *out, int outlen, u32 dptr, u32 sptr); + /* I2C control api */ int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data); |
