diff options
| author | Alexander Shishkin <alexander.shishkin@linux.intel.com> | 2015-01-14 14:18:20 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-04-02 17:14:19 +0200 |
| commit | 4807034248bed58d49a4f9f450c024e3b0f58577 (patch) | |
| tree | f5d76d32a1046852d6748d9405c3706910a1d1d6 /arch/x86/include/uapi/asm/msr-index.h | |
| parent | ed69628b3b04578179334393d7f5fe60a2681f1c (diff) | |
| download | op-kernel-dev-4807034248bed58d49a4f9f450c024e3b0f58577.zip op-kernel-dev-4807034248bed58d49a4f9f450c024e3b0f58577.tar.gz | |
perf/x86: Mark Intel PT and LBR/BTS as mutually exclusive
Intel PT cannot be used at the same time as LBR or BTS and will cause a
general protection fault if they are used together. In order to avoid
fixing up GPs in the fast path, instead we disallow creating LBR/BTS
events when PT events are present and vice versa.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kaixu Xia <kaixu.xia@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Robert Richter <rric@kernel.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@infradead.org
Cc: adrian.hunter@intel.com
Cc: kan.liang@intel.com
Cc: markus.t.metzger@intel.com
Cc: mathieu.poirier@linaro.org
Link: http://lkml.kernel.org/r/1421237903-181015-12-git-send-email-alexander.shishkin@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include/uapi/asm/msr-index.h')
0 files changed, 0 insertions, 0 deletions
