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author | H. Peter Anvin <hpa@zytor.com> | 2010-07-07 10:15:12 -0700 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2010-07-07 10:15:12 -0700 |
commit | 24da9c26f3050aee9314ec09930a24c80fe76352 (patch) | |
tree | d5ade741eabb930bff9149acdf9e05c9f68ade44 /arch/x86/include/asm | |
parent | 23016bf0d25d62c45d8b8f61d55b290d704f7a79 (diff) | |
download | op-kernel-dev-24da9c26f3050aee9314ec09930a24c80fe76352.zip op-kernel-dev-24da9c26f3050aee9314ec09930a24c80fe76352.tar.gz |
x86, cpu: Add CPU flags for F16C and RDRND
Add support for the newly documented F16C (16-bit floating point
conversions) and RDRND (RDRAND instruction) CPU feature flags.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r-- | arch/x86/include/asm/cpufeature.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 2a904f4..aeb6f3f 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -124,6 +124,8 @@ #define X86_FEATURE_XSAVE (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */ #define X86_FEATURE_OSXSAVE (4*32+27) /* "" XSAVE enabled in the OS */ #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */ +#define X86_FEATURE_F16C (4*32+29) /* 16-bit fp conversions */ +#define X86_FEATURE_RDRND (4*32+30) /* The RDRAND instruction */ #define X86_FEATURE_HYPERVISOR (4*32+31) /* Running on a hypervisor */ /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ |