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author | Junaid Shahid <junaids@google.com> | 2016-12-06 16:46:16 -0800 |
---|---|---|
committer | Radim Krčmář <rkrcmar@redhat.com> | 2017-01-09 14:46:11 +0100 |
commit | f160c7b7bb322bf079a5bb4dd34c58f17553f193 (patch) | |
tree | df8f36cae081baeec8859cc367175d6dcaf36c85 /arch/x86/include/asm/vmx.h | |
parent | 37f0e8fe6b10ee2ab52576caa721ee1282de74a6 (diff) | |
download | op-kernel-dev-f160c7b7bb322bf079a5bb4dd34c58f17553f193.zip op-kernel-dev-f160c7b7bb322bf079a5bb4dd34c58f17553f193.tar.gz |
kvm: x86: mmu: Lockless access tracking for Intel CPUs without EPT A bits.
This change implements lockless access tracking for Intel CPUs without EPT
A bits. This is achieved by marking the PTEs as not-present (but not
completely clearing them) when clear_flush_young() is called after marking
the pages as accessed. When an EPT Violation is generated as a result of
the VM accessing those pages, the PTEs are restored to their original values.
Signed-off-by: Junaid Shahid <junaids@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/vmx.h')
-rw-r--r-- | arch/x86/include/asm/vmx.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index fc061cb..a22a479 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h @@ -469,11 +469,14 @@ enum vmcs_field { #define VMX_EPT_IPAT_BIT (1ull << 6) #define VMX_EPT_ACCESS_BIT (1ull << 8) #define VMX_EPT_DIRTY_BIT (1ull << 9) +#define VMX_EPT_RWX_MASK (VMX_EPT_READABLE_MASK | \ + VMX_EPT_WRITABLE_MASK | \ + VMX_EPT_EXECUTABLE_MASK) +#define VMX_EPT_MT_MASK (7ull << VMX_EPT_MT_EPTE_SHIFT) /* The mask to use to trigger an EPT Misconfiguration in order to track MMIO */ -#define VMX_EPT_MISCONFIG_WX_VALUE (VMX_EPT_WRITABLE_MASK | \ - VMX_EPT_EXECUTABLE_MASK) - +#define VMX_EPT_MISCONFIG_WX_VALUE (VMX_EPT_WRITABLE_MASK | \ + VMX_EPT_EXECUTABLE_MASK) #define VMX_EPT_IDENTITY_PAGETABLE_ADDR 0xfffbc000ul |