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authorBorislav Petkov <petkovbb@googlemail.com>2009-08-31 09:50:09 +0200
committerH. Peter Anvin <hpa@zytor.com>2009-08-31 15:14:26 -0700
commit132ec92f3f70fe365c1f4b8d46e66cf8a2a16880 (patch)
treef8e3f3ab5541f583030b0bcd5f3f81ca338f77a2 /arch/x86/include/asm/msr.h
parent366d19e181be873c70f4aafca3931d77d781ccd7 (diff)
downloadop-kernel-dev-132ec92f3f70fe365c1f4b8d46e66cf8a2a16880.zip
op-kernel-dev-132ec92f3f70fe365c1f4b8d46e66cf8a2a16880.tar.gz
x86, msr: Add rd/wrmsr interfaces with preset registers
native_{rdmsr,wrmsr}_safe_regs are two new interfaces which allow presetting of a subset of eight x86 GPRs before executing the rd/wrmsr instructions. This is needed at least on AMD K8 for accessing an erratum workaround MSR. Originally based on an idea by H. Peter Anvin. Signed-off-by: Borislav Petkov <petkovbb@gmail.com> LKML-Reference: <1251705011-18636-1-git-send-email-petkovbb@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/msr.h')
-rw-r--r--arch/x86/include/asm/msr.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 48ad9d2..184d4a1 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -113,6 +113,9 @@ notrace static inline int native_write_msr_safe(unsigned int msr,
extern unsigned long long native_read_tsc(void);
+extern int native_rdmsr_safe_regs(u32 *regs);
+extern int native_wrmsr_safe_regs(u32 *regs);
+
static __always_inline unsigned long long __native_read_tsc(void)
{
DECLARE_ARGS(val, low, high);
@@ -189,6 +192,16 @@ static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
return err;
}
+static inline int rdmsr_safe_regs(u32 *regs)
+{
+ return native_rdmsr_safe_regs(regs);
+}
+
+static inline int wrmsr_safe_regs(u32 *regs)
+{
+ return native_wrmsr_safe_regs(regs);
+}
+
#define rdtscl(low) \
((low) = (u32)__native_read_tsc())
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