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authorIngo Molnar <mingo@elte.hu>2009-03-05 21:49:25 +0100
committerIngo Molnar <mingo@elte.hu>2009-03-05 21:49:25 +0100
commitcaab36b593b44c97e3c7707c6a8054b320f8d622 (patch)
tree70c8d67d51c616c357529d761a82ad382481dad7 /arch/x86/include/asm/msr-index.h
parenta1413c89ae6a4b7a9a43f7768934a81ffb5c629a (diff)
parent73af76dfd1f998dba71d8e8e785cbe77a990bf17 (diff)
downloadop-kernel-dev-caab36b593b44c97e3c7707c6a8054b320f8d622.zip
op-kernel-dev-caab36b593b44c97e3c7707c6a8054b320f8d622.tar.gz
Merge branch 'x86/mce2' into x86/core
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r--arch/x86/include/asm/msr-index.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 358acc5..2dbd231 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -77,6 +77,11 @@
#define MSR_IA32_MC0_ADDR 0x00000402
#define MSR_IA32_MC0_MISC 0x00000403
+/* These are consecutive and not in the normal 4er MCE bank block */
+#define MSR_IA32_MC0_CTL2 0x00000280
+#define CMCI_EN (1ULL << 30)
+#define CMCI_THRESHOLD_MASK 0xffffULL
+
#define MSR_P6_PERFCTR0 0x000000c1
#define MSR_P6_PERFCTR1 0x000000c2
#define MSR_P6_EVNTSEL0 0x00000186
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