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authorIngo Molnar <mingo@elte.hu>2011-12-15 08:21:21 +0100
committerIngo Molnar <mingo@elte.hu>2011-12-15 08:21:30 +0100
commit6a54aebf6978e9f296a4d3da3e40af425163c22e (patch)
tree8217c7114db02d8b69c22fc44880749426949bc3 /arch/x86/include/asm/mrst.h
parent067491b7313c41f49607fce782d29344d1472587 (diff)
parentdc47ce90c3a822cd7c9e9339fe4d5f61dcb26b50 (diff)
downloadop-kernel-dev-6a54aebf6978e9f296a4d3da3e40af425163c22e.zip
op-kernel-dev-6a54aebf6978e9f296a4d3da3e40af425163c22e.tar.gz
Merge commit 'v3.2-rc5' into sched/core
Merge reason: Pick up the latest fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/mrst.h')
-rw-r--r--arch/x86/include/asm/mrst.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 719f00b..93f7909 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -31,11 +31,20 @@ enum mrst_cpu_type {
};
extern enum mrst_cpu_type __mrst_cpu_chip;
+
+#ifdef CONFIG_X86_INTEL_MID
+
static inline enum mrst_cpu_type mrst_identify_cpu(void)
{
return __mrst_cpu_chip;
}
+#else /* !CONFIG_X86_INTEL_MID */
+
+#define mrst_identify_cpu() (0)
+
+#endif /* !CONFIG_X86_INTEL_MID */
+
enum mrst_timer_options {
MRST_TIMER_DEFAULT,
MRST_TIMER_APBT_ONLY,
@@ -44,6 +53,13 @@ enum mrst_timer_options {
extern enum mrst_timer_options mrst_timer_options;
+/*
+ * Penwell uses spread spectrum clock, so the freq number is not exactly
+ * the same as reported by MSR based on SDM.
+ */
+#define PENWELL_FSB_FREQ_83SKU 83200
+#define PENWELL_FSB_FREQ_100SKU 99840
+
#define SFI_MTMR_MAX_NUM 8
#define SFI_MRTC_MAX 8
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