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| author | Andi Kleen <ak@linux.intel.com> | 2009-04-29 19:31:00 +0200 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2009-05-28 09:24:14 -0700 |
| commit | ea149b36c7f511d17dd89fee734cb09778a91fa0 (patch) | |
| tree | 04466a9b92dc5ce01c2ab8661165e3564d99f5c1 /arch/x86/Kconfig | |
| parent | 5f8c1a54cab6f449fe04d42d0661bc796fa4e73e (diff) | |
| download | op-kernel-dev-ea149b36c7f511d17dd89fee734cb09778a91fa0.zip op-kernel-dev-ea149b36c7f511d17dd89fee734cb09778a91fa0.tar.gz | |
x86, mce: add basic error injection infrastructure
Allow user programs to write mce records into /dev/mcelog. When they do
that a fake machine check is triggered to test the machine check code.
This uses the MCE MSR wrappers added earlier.
The implementation is straight forward. There is a struct mce record
per CPU and the MCE MSR accesses get data from there if there is valid
data injected there. This allows to test the machine check code
relatively realistically because only the lowest layer of hardware
access is intercepted.
The test suite and injector are available at
git://git.kernel.org/pub/scm/utils/cpu/mce/mce-test.git
git://git.kernel.org/pub/scm/utils/cpu/mce/mce-inject.git
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index a148e7a..e25b635 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -835,6 +835,14 @@ config X86_MCE_THRESHOLD bool default y +config X86_MCE_INJECT + depends on X86_NEW_MCE + tristate "Machine check injector support" + ---help--- + Provide support for injecting machine checks for testing purposes. + If you don't know what a machine check is and you don't do kernel + QA it is safe to say n. + config X86_MCE_NONFATAL tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4" depends on X86_OLD_MCE |
