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authorIra W. Snyder <iws@ovro.caltech.edu>2010-04-01 11:43:30 -0700
committerJesse Barnes <jbarnes@virtuousgeek.org>2010-05-21 14:43:46 -0700
commit3f6ea84a3035cc0ef7488f8e93bc76766799e082 (patch)
tree30f714b86c1221e2e832f27e1d15c6c1803c8b95 /arch/x86/Kconfig
parent3322340a9db2251ac9d09bc7b8d49e872298ae95 (diff)
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op-kernel-dev-3f6ea84a3035cc0ef7488f8e93bc76766799e082.tar.gz
PCI: read memory ranges out of Broadcom CNB20LE host bridge
Read the memory ranges behind the Broadcom CNB20LE host bridge out of the hardware. This allows PCI hotplugging to work, since we know which memory range to allocate PCI BAR's from. The x86 PCI code automatically prefers the ACPI _CRS information when it is available. In that case, this information is not used. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'arch/x86/Kconfig')
-rw-r--r--arch/x86/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9458685..677b87d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1931,6 +1931,14 @@ config PCI_MMCONFIG
bool "Support mmconfig PCI config space access"
depends on X86_64 && PCI && ACPI
+config PCI_CNB20LE_QUIRK
+ bool "Read CNB20LE Host Bridge Windows"
+ depends on PCI
+ help
+ Read the PCI windows out of the CNB20LE host bridge. This allows
+ PCI hotplug to work on systems with the CNB20LE chipset which do
+ not have ACPI.
+
config DMAR
bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
depends on PCI_MSI && ACPI && EXPERIMENTAL
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