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| author | GuanXuetao <gxt@mprc.pku.edu.cn> | 2011-02-26 20:08:36 +0800 |
|---|---|---|
| committer | GuanXuetao <gxt@mprc.pku.edu.cn> | 2011-03-17 09:19:14 +0800 |
| commit | b08b4f8e63e60a64f81e194269be14afee396f33 (patch) | |
| tree | d76aef05929a7f28f1463c72adefd8af780192c8 /arch/unicore32/include/mach/regs-resetc.h | |
| parent | fa7499ef77db8d535e3c609c8064e9ee50c0693c (diff) | |
| download | op-kernel-dev-b08b4f8e63e60a64f81e194269be14afee396f33.zip op-kernel-dev-b08b4f8e63e60a64f81e194269be14afee396f33.tar.gz | |
unicore32 machine related files: hardware registers
This patch adds all hardware registers definitions.
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Diffstat (limited to 'arch/unicore32/include/mach/regs-resetc.h')
| -rw-r--r-- | arch/unicore32/include/mach/regs-resetc.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/unicore32/include/mach/regs-resetc.h b/arch/unicore32/include/mach/regs-resetc.h new file mode 100644 index 0000000..1763989 --- /dev/null +++ b/arch/unicore32/include/mach/regs-resetc.h @@ -0,0 +1,34 @@ +/* + * PKUnity Reset Controller (RC) Registers + */ +/* + * Software Reset Register + */ +#define RESETC_SWRR __REG(PKUNITY_RESETC_BASE + 0x0000) +/* + * Reset Status Register + */ +#define RESETC_RSSR __REG(PKUNITY_RESETC_BASE + 0x0004) + +/* + * Software Reset Bit + */ +#define RESETC_SWRR_SRB FIELD(1, 1, 0) + +/* + * Hardware Reset + */ +#define RESETC_RSSR_HWR FIELD(1, 1, 0) +/* + * Software Reset + */ +#define RESETC_RSSR_SWR FIELD(1, 1, 1) +/* + * Watchdog Reset + */ +#define RESETC_RSSR_WDR FIELD(1, 1, 2) +/* + * Sleep Mode Reset + */ +#define RESETC_RSSR_SMR FIELD(1, 1, 3) + |
