diff options
| author | GuanXuetao <gxt@mprc.pku.edu.cn> | 2011-03-04 18:07:48 +0800 |
|---|---|---|
| committer | GuanXuetao <gxt@mprc.pku.edu.cn> | 2011-03-17 09:19:21 +0800 |
| commit | 1cf46c42d7688a2e09de87fc9201b0e9a0961866 (patch) | |
| tree | f6bba402319785ed745be62e5b655715626d2761 /arch/unicore32/include/mach/regs-ost.h | |
| parent | 4fde87cb13a29c06e0b4c2cba86445492098fbc2 (diff) | |
| download | op-kernel-dev-1cf46c42d7688a2e09de87fc9201b0e9a0961866.zip op-kernel-dev-1cf46c42d7688a2e09de87fc9201b0e9a0961866.tar.gz | |
unicore32: modify io_p2v and io_v2p macros, and adjust PKUNITY_mmio_BASEs
1. remove __REG macro
2. add (void __iomem *) to io_p2v macro
3. add (phys_addr_t) to io_v2p macro
4. add PKUNITY_AHB_BASE and PKUNITY_APB_BASE definitions
5. modify all PKUNITY_mmio_BASEs from physical addr to virtual addr
6. adjust prefix macro for all usage of PKUNITY_mmio_BASEs
-- by advice with Arnd Bergmann
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/unicore32/include/mach/regs-ost.h')
| -rw-r--r-- | arch/unicore32/include/mach/regs-ost.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/unicore32/include/mach/regs-ost.h b/arch/unicore32/include/mach/regs-ost.h index 33049a8..7b91fe6 100644 --- a/arch/unicore32/include/mach/regs-ost.h +++ b/arch/unicore32/include/mach/regs-ost.h @@ -4,47 +4,47 @@ /* * Match Reg 0 OST_OSMR0 */ -#define OST_OSMR0 __REG(PKUNITY_OST_BASE + 0x0000) +#define OST_OSMR0 (PKUNITY_OST_BASE + 0x0000) /* * Match Reg 1 OST_OSMR1 */ -#define OST_OSMR1 __REG(PKUNITY_OST_BASE + 0x0004) +#define OST_OSMR1 (PKUNITY_OST_BASE + 0x0004) /* * Match Reg 2 OST_OSMR2 */ -#define OST_OSMR2 __REG(PKUNITY_OST_BASE + 0x0008) +#define OST_OSMR2 (PKUNITY_OST_BASE + 0x0008) /* * Match Reg 3 OST_OSMR3 */ -#define OST_OSMR3 __REG(PKUNITY_OST_BASE + 0x000C) +#define OST_OSMR3 (PKUNITY_OST_BASE + 0x000C) /* * Counter Reg OST_OSCR */ -#define OST_OSCR __REG(PKUNITY_OST_BASE + 0x0010) +#define OST_OSCR (PKUNITY_OST_BASE + 0x0010) /* * Status Reg OST_OSSR */ -#define OST_OSSR __REG(PKUNITY_OST_BASE + 0x0014) +#define OST_OSSR (PKUNITY_OST_BASE + 0x0014) /* * Watchdog Enable Reg OST_OWER */ -#define OST_OWER __REG(PKUNITY_OST_BASE + 0x0018) +#define OST_OWER (PKUNITY_OST_BASE + 0x0018) /* * Interrupt Enable Reg OST_OIER */ -#define OST_OIER __REG(PKUNITY_OST_BASE + 0x001C) +#define OST_OIER (PKUNITY_OST_BASE + 0x001C) /* * PWM Pulse Width Control Reg OST_PWMPWCR */ -#define OST_PWMPWCR __REG(PKUNITY_OST_BASE + 0x0080) +#define OST_PWMPWCR (PKUNITY_OST_BASE + 0x0080) /* * PWM Duty Cycle Control Reg OST_PWMDCCR */ -#define OST_PWMDCCR __REG(PKUNITY_OST_BASE + 0x0084) +#define OST_PWMDCCR (PKUNITY_OST_BASE + 0x0084) /* * PWM Period Control Reg OST_PWMPCR */ -#define OST_PWMPCR __REG(PKUNITY_OST_BASE + 0x0088) +#define OST_PWMPCR (PKUNITY_OST_BASE + 0x0088) /* * Match detected 0 OST_OSSR_M0 |
