summaryrefslogtreecommitdiffstats
path: root/arch/tile
diff options
context:
space:
mode:
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-12-21 14:06:37 -0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-01-03 15:57:13 -0800
commitb881bc469bdbdcca60e75047885509eb9886d3a2 (patch)
tree5eb755591b667df0f04d7355544de613143458a7 /arch/tile
parentf8d6c8d98d9ea7afef1e0d93d756a2dca879d1ea (diff)
downloadop-kernel-dev-b881bc469bdbdcca60e75047885509eb9886d3a2.zip
op-kernel-dev-b881bc469bdbdcca60e75047885509eb9886d3a2.tar.gz
ARCH: drivers remove __dev* attributes.
This fixes up all of the smaller arches that had __dev* markings for their platform-specific drivers. CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Mikael Starvik <starvik@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Michal Simek <monstr@monstr.eu> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Cc: Jonas Bonn <jonas@southpole.se> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Helge Deller <deller@gmx.de> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Chen Liqin <liqin.chen@sunplusct.com> Cc: Lennox Wu <lennox.wu@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Bob Liu <lliubbo@gmail.com> Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Myron Stowe <myron.stowe@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andi Kleen <ak@linux.intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com> Cc: Mark Salter <msalter@redhat.com> Cc: Yong Zhang <yong.zhang0@gmail.com> Cc: Michael Holzheu <holzheu@linux.vnet.ibm.com> Cc: Cornelia Huck <cornelia.huck@de.ibm.com> Cc: Jan Glauber <jang@linux.vnet.ibm.com> Cc: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/tile')
-rw-r--r--arch/tile/include/asm/pci.h2
-rw-r--r--arch/tile/kernel/pci.c23
-rw-r--r--arch/tile/kernel/pci_gx.c33
3 files changed, 22 insertions, 36 deletions
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index 302cdf7..54a9242 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -188,7 +188,7 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
int __init tile_pci_init(void);
int __init pcibios_init(void);
-void __devinit pcibios_fixup_bus(struct pci_bus *bus);
+void pcibios_fixup_bus(struct pci_bus *bus);
#define pci_domain_nr(bus) (((struct pci_controller *)(bus)->sysdata)->index)
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index aac1cd5..67237d3 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -81,7 +81,7 @@ EXPORT_SYMBOL(pcibios_align_resource);
* controller_id is the controller number, config type is 0 or 1 for
* config0 or config1 operations.
*/
-static int __devinit tile_pcie_open(int controller_id, int config_type)
+static int tile_pcie_open(int controller_id, int config_type)
{
char filename[32];
int fd;
@@ -97,8 +97,7 @@ static int __devinit tile_pcie_open(int controller_id, int config_type)
/*
* Get the IRQ numbers from the HV and set up the handlers for them.
*/
-static int __devinit tile_init_irqs(int controller_id,
- struct pci_controller *controller)
+static int tile_init_irqs(int controller_id, struct pci_controller *controller)
{
char filename[32];
int fd;
@@ -237,7 +236,7 @@ static int tile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
}
-static void __devinit fixup_read_and_payload_sizes(void)
+static void fixup_read_and_payload_sizes(void)
{
struct pci_dev *dev = NULL;
int smallest_max_payload = 0x1; /* Tile maxes out at 256 bytes. */
@@ -379,7 +378,7 @@ subsys_initcall(pcibios_init);
/*
* No bus fixups needed.
*/
-void __devinit pcibios_fixup_bus(struct pci_bus *bus)
+void pcibios_fixup_bus(struct pci_bus *bus)
{
/* Nothing needs to be done. */
}
@@ -458,11 +457,8 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
* specified bus & slot.
*/
-static int __devinit tile_cfg_read(struct pci_bus *bus,
- unsigned int devfn,
- int offset,
- int size,
- u32 *val)
+static int tile_cfg_read(struct pci_bus *bus, unsigned int devfn, int offset,
+ int size, u32 *val)
{
struct pci_controller *controller = bus->sysdata;
int busnum = bus->number & 0xff;
@@ -504,11 +500,8 @@ static int __devinit tile_cfg_read(struct pci_bus *bus,
* See tile_cfg_read() for relevant comments.
* Note that "val" is the value to write, not a pointer to that value.
*/
-static int __devinit tile_cfg_write(struct pci_bus *bus,
- unsigned int devfn,
- int offset,
- int size,
- u32 val)
+static int tile_cfg_write(struct pci_bus *bus, unsigned int devfn, int offset,
+ int size, u32 val)
{
struct pci_controller *controller = bus->sysdata;
int busnum = bus->number & 0xff;
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index 94810d4..1142563 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -58,10 +58,10 @@
#define TRACE_CFG_RD(...)
#endif
-static int __devinitdata pci_probe = 1;
+static int pci_probe = 1;
/* Information on the PCIe RC ports configuration. */
-static int __devinitdata pcie_rc[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
+static int pcie_rc[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
/*
* On some platforms with one or more Gx endpoint ports, we need to
@@ -72,7 +72,7 @@ static int __devinitdata pcie_rc[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
* the delay in seconds. If the delay is not provided, the value
* will be DEFAULT_RC_DELAY.
*/
-static int __devinitdata rc_delay[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
+static int rc_delay[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
/* Default number of seconds that the PCIe RC port probe can be delayed. */
#define DEFAULT_RC_DELAY 10
@@ -137,7 +137,7 @@ static int tile_irq_cpu(int irq)
/*
* Open a file descriptor to the TRIO shim.
*/
-static int __devinit tile_pcie_open(int trio_index)
+static int tile_pcie_open(int trio_index)
{
gxio_trio_context_t *context = &trio_contexts[trio_index];
int ret;
@@ -265,7 +265,7 @@ trio_handle_level_irq(unsigned int irq, struct irq_desc *desc)
* Create kernel irqs and set up the handlers for the legacy interrupts.
* Also some minimum initialization for the MSI support.
*/
-static int __devinit tile_init_irqs(struct pci_controller *controller)
+static int tile_init_irqs(struct pci_controller *controller)
{
int i;
int j;
@@ -459,8 +459,7 @@ static int tile_map_irq(const struct pci_dev *dev, u8 device, u8 pin)
}
-static void __devinit fixup_read_and_payload_sizes(struct pci_controller *
- controller)
+static void fixup_read_and_payload_sizes(struct pci_controller *controller)
{
gxio_trio_context_t *trio_context = controller->trio;
struct pci_bus *root_bus = controller->root_bus;
@@ -541,7 +540,7 @@ static void __devinit fixup_read_and_payload_sizes(struct pci_controller *
}
}
-static int __devinit setup_pcie_rc_delay(char *str)
+static int setup_pcie_rc_delay(char *str)
{
unsigned long delay = 0;
unsigned long trio_index;
@@ -1016,7 +1015,7 @@ alloc_mem_map_failed:
subsys_initcall(pcibios_init);
/* Note: to be deleted after Linux 3.6 merge. */
-void __devinit pcibios_fixup_bus(struct pci_bus *bus)
+void pcibios_fixup_bus(struct pci_bus *bus)
{
}
@@ -1024,7 +1023,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
* This can be called from the generic PCI layer, but doesn't need to
* do anything.
*/
-char __devinit *pcibios_setup(char *str)
+char *pcibios_setup(char *str)
{
if (!strcmp(str, "off")) {
pci_probe = 0;
@@ -1143,11 +1142,8 @@ EXPORT_SYMBOL(pci_iounmap);
* specified bus & device.
*/
-static int __devinit tile_cfg_read(struct pci_bus *bus,
- unsigned int devfn,
- int offset,
- int size,
- u32 *val)
+static int tile_cfg_read(struct pci_bus *bus, unsigned int devfn, int offset,
+ int size, u32 *val)
{
struct pci_controller *controller = bus->sysdata;
gxio_trio_context_t *trio_context = controller->trio;
@@ -1271,11 +1267,8 @@ invalid_device:
* See tile_cfg_read() for relevent comments.
* Note that "val" is the value to write, not a pointer to that value.
*/
-static int __devinit tile_cfg_write(struct pci_bus *bus,
- unsigned int devfn,
- int offset,
- int size,
- u32 val)
+static int tile_cfg_write(struct pci_bus *bus, unsigned int devfn, int offset,
+ int size, u32 val)
{
struct pci_controller *controller = bus->sysdata;
gxio_trio_context_t *trio_context = controller->trio;
OpenPOWER on IntegriCloud