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authorAllen Pais <allen.pais@oracle.com>2014-09-08 11:48:54 +0530
committerDavid S. Miller <davem@davemloft.net>2014-09-09 15:24:10 -0700
commit9bd3ee33f6b97de092610d8dcabc4cb98d99505c (patch)
tree93b085dc77c411e3ea65bb9d2149fa7a9ae3cf42 /arch/sparc
parentcadbb58039f7cab1def9c931012ab04c953a6997 (diff)
downloadop-kernel-dev-9bd3ee33f6b97de092610d8dcabc4cb98d99505c.zip
op-kernel-dev-9bd3ee33f6b97de092610d8dcabc4cb98d99505c.tar.gz
sparc64: support M6 and M7 for building CPU distribution map
Add M6 and M7 chip type in cpumap.c to correctly build CPU distribution map that spans all online CPUs. Signed-off-by: Allen Pais <allen.pais@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc')
-rw-r--r--arch/sparc/kernel/cpumap.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/sparc/kernel/cpumap.c b/arch/sparc/kernel/cpumap.c
index de1c844..e69ec0e 100644
--- a/arch/sparc/kernel/cpumap.c
+++ b/arch/sparc/kernel/cpumap.c
@@ -326,6 +326,8 @@ static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index)
case SUN4V_CHIP_NIAGARA3:
case SUN4V_CHIP_NIAGARA4:
case SUN4V_CHIP_NIAGARA5:
+ case SUN4V_CHIP_SPARC_M6:
+ case SUN4V_CHIP_SPARC_M7:
case SUN4V_CHIP_SPARC64X:
rover_inc_table = niagara_iterate_method;
break;
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