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| author | David S. Miller <davem@davemloft.net> | 2008-11-15 13:33:25 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-12-04 09:16:47 -0800 |
| commit | 293666b7a17cb7a389fc274980439212386a19c4 (patch) | |
| tree | 075cc7661d2113cf04da7130b3383979d8024206 /arch/sparc64/mm | |
| parent | 64f2dde3f743c8a1ad8c0a1aa74166c1034afd92 (diff) | |
| download | op-kernel-dev-293666b7a17cb7a389fc274980439212386a19c4.zip op-kernel-dev-293666b7a17cb7a389fc274980439212386a19c4.tar.gz | |
sparc64: Stop using memory barriers for atomics and locks.
The kernel always executes in the TSO memory model now,
so none of this stuff is necessary any more.
With helpful feedback from Nick Piggin.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/mm')
| -rw-r--r-- | arch/sparc64/mm/init.c | 2 | ||||
| -rw-r--r-- | arch/sparc64/mm/tsb.c | 4 | ||||
| -rw-r--r-- | arch/sparc64/mm/ultra.S | 2 |
3 files changed, 1 insertions, 7 deletions
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c index 185f346..4bd6396 100644 --- a/arch/sparc64/mm/init.c +++ b/arch/sparc64/mm/init.c @@ -214,7 +214,6 @@ static inline void set_dcache_dirty(struct page *page, int this_cpu) "or %%g1, %0, %%g1\n\t" "casx [%2], %%g7, %%g1\n\t" "cmp %%g7, %%g1\n\t" - "membar #StoreLoad | #StoreStore\n\t" "bne,pn %%xcc, 1b\n\t" " nop" : /* no outputs */ @@ -236,7 +235,6 @@ static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu) " andn %%g7, %1, %%g1\n\t" "casx [%2], %%g7, %%g1\n\t" "cmp %%g7, %%g1\n\t" - "membar #StoreLoad | #StoreStore\n\t" "bne,pn %%xcc, 1b\n\t" " nop\n" "2:" diff --git a/arch/sparc64/mm/tsb.c b/arch/sparc64/mm/tsb.c index 587f8ef..f0282fa 100644 --- a/arch/sparc64/mm/tsb.c +++ b/arch/sparc64/mm/tsb.c @@ -41,10 +41,8 @@ void flush_tsb_kernel_range(unsigned long start, unsigned long end) KERNEL_TSB_NENTRIES); struct tsb *ent = &swapper_tsb[hash]; - if (tag_compare(ent->tag, v)) { + if (tag_compare(ent->tag, v)) ent->tag = (1UL << TSB_TAG_INVALID_BIT); - membar_storeload_storestore(); - } } } diff --git a/arch/sparc64/mm/ultra.S b/arch/sparc64/mm/ultra.S index 86773e8..e4c146f 100644 --- a/arch/sparc64/mm/ultra.S +++ b/arch/sparc64/mm/ultra.S @@ -125,7 +125,6 @@ __spitfire_flush_tlb_mm_slow: .align 32 .globl __flush_icache_page __flush_icache_page: /* %o0 = phys_page */ - membar #StoreStore srlx %o0, PAGE_SHIFT, %o0 sethi %uhi(PAGE_OFFSET), %g1 sllx %o0, PAGE_SHIFT, %o0 @@ -507,7 +506,6 @@ xcall_fetch_glob_regs: sllx %g2, TRAP_BLOCK_SZ_SHIFT, %g2 add %g7, %g2, %g7 ldx [%g7 + TRAP_PER_CPU_THREAD], %g3 - membar #StoreStore stx %g3, [%g1 + GR_SNAP_THREAD] retry |
