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author | David S. Miller <davem@davemloft.net> | 2005-05-23 15:52:08 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2005-05-23 15:52:08 -0700 |
commit | 816242da3735957bee99aeba40aa60c4f120a101 (patch) | |
tree | c5a1092a52911143b0c4f9bc4257c1dbafbb8bdd /arch/sparc64/kernel/setup.c | |
parent | ab3fc403633c38aef5ef48844f8e5dbfee7c34f8 (diff) | |
download | op-kernel-dev-816242da3735957bee99aeba40aa60c4f120a101.zip op-kernel-dev-816242da3735957bee99aeba40aa60c4f120a101.tar.gz |
[SPARC64]: Add boot option to force UltraSPARC-III P-Cache on.
Older UltraSPARC-III chips have a P-Cache bug that makes us disable it
by default at boot time.
However, this does hurt performance substantially, particularly with
memcpy(), and the bug is _incredibly_ obscure. I have never seen it
triggered in practice, ever.
So provide a "-P" boot option that forces the P-Cache on. It taints
the kernel, so if it does trigger and cause some data corruption or
OOPS, we will find out in the logs that this option was on when it
happened.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/setup.c')
-rw-r--r-- | arch/sparc64/kernel/setup.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c index 12c3d84b..b7e6a91 100644 --- a/arch/sparc64/kernel/setup.c +++ b/arch/sparc64/kernel/setup.c @@ -383,6 +383,17 @@ static void __init process_switch(char c) /* Use PROM debug console. */ register_console(&prom_debug_console); break; + case 'P': + /* Force UltraSPARC-III P-Cache on. */ + if (tlb_type != cheetah) { + printk("BOOT: Ignoring P-Cache force option.\n"); + break; + } + cheetah_pcache_forced_on = 1; + add_taint(TAINT_MACHINE_CHECK); + cheetah_enable_pcache(); + break; + default: printk("Unknown boot switch (-%c)\n", c); break; |