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| author | David S. Miller <davem@davemloft.net> | 2013-09-20 21:50:41 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-11-12 15:22:34 -0800 |
| commit | b2d438348024b75a1ee8b66b85d77f569a5dfed8 (patch) | |
| tree | 057c725d9d058d326533d0947aedd226adb57540 /arch/sparc/lib/copy_page.S | |
| parent | f998c9c0d663b013e3aa3ba78908396c8c497218 (diff) | |
| download | op-kernel-dev-b2d438348024b75a1ee8b66b85d77f569a5dfed8.zip op-kernel-dev-b2d438348024b75a1ee8b66b85d77f569a5dfed8.tar.gz | |
sparc64: Make PAGE_OFFSET variable.
Choose PAGE_OFFSET dynamically based upon cpu type.
Original UltraSPARC-I (spitfire) chips only supported a 44-bit
virtual address space.
Newer chips (T4 and later) support 52-bit virtual addresses
and up to 47-bits of physical memory space.
Therefore we have to adjust PAGE_SIZE dynamically based upon
the capabilities of the chip.
Note that this change alone does not allow us to support > 43-bit
physical memory, to do that we need to re-arrange our page table
support. The current encodings of the pmd_t and pgd_t pointers
restricts us to "32 + 11" == 43 bits.
This change can waste quite a bit of memory for the various tables.
In particular, a future change should work to size and allocate
kern_linear_bitmap[] and sparc64_valid_addr_bitmap[] dynamically.
This isn't easy as we really cannot take a TLB miss when accessing
kern_linear_bitmap[]. We'd have to lock it into the TLB or similar.
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Bob Picco <bob.picco@oracle.com>
Diffstat (limited to 'arch/sparc/lib/copy_page.S')
| -rw-r--r-- | arch/sparc/lib/copy_page.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/sparc/lib/copy_page.S b/arch/sparc/lib/copy_page.S index 4d2df32..dd16c61 100644 --- a/arch/sparc/lib/copy_page.S +++ b/arch/sparc/lib/copy_page.S @@ -46,10 +46,10 @@ .type copy_user_page,#function copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */ lduw [%g6 + TI_PRE_COUNT], %o4 - sethi %uhi(PAGE_OFFSET), %g2 + sethi %hi(PAGE_OFFSET), %g2 sethi %hi(PAGE_SIZE), %o3 - sllx %g2, 32, %g2 + ldx [%g2 + %lo(PAGE_OFFSET)], %g2 sethi %hi(PAGE_KERNEL_LOCKED), %g3 ldx [%g3 + %lo(PAGE_KERNEL_LOCKED)], %g3 |
