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| author | David S. Miller <davem@davemloft.net> | 2010-08-17 22:49:26 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-08-17 22:49:26 -0700 |
| commit | 9b3bb86acabe0c05923cea1ed3b0bee9439fef4b (patch) | |
| tree | 44095535e5f2634c319122b718c8998ee3b52511 /arch/sparc/include/asm/rwsem-const.h | |
| parent | b10f997bb0f4e5b34d447f498fb85834a40d3acb (diff) | |
| download | op-kernel-dev-9b3bb86acabe0c05923cea1ed3b0bee9439fef4b.zip op-kernel-dev-9b3bb86acabe0c05923cea1ed3b0bee9439fef4b.tar.gz | |
sparc64: Make rwsems 64-bit.
Basically tip-off the powerpc code, use a 64-bit type and atomic64_t
interfaces for the implementation.
This gets us off of the by-hand asm code I wrote, which frankly I
think probably ruins I-cache hit rates.
The idea was the keep the call chains less deep, but anything taking
the rw-semaphores probably is also calling other stuff and therefore
already has allocated a stack-frame. So no real stack frame savings
ever.
Ben H. has posted patches to make powerpc use 64-bit too and with some
abstractions we can probably use a shared header file somewhere.
With suggestions from Sam Ravnborg.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm/rwsem-const.h')
| -rw-r--r-- | arch/sparc/include/asm/rwsem-const.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/sparc/include/asm/rwsem-const.h b/arch/sparc/include/asm/rwsem-const.h deleted file mode 100644 index e4c61a1..0000000 --- a/arch/sparc/include/asm/rwsem-const.h +++ /dev/null @@ -1,12 +0,0 @@ -/* rwsem-const.h: RW semaphore counter constants. */ -#ifndef _SPARC64_RWSEM_CONST_H -#define _SPARC64_RWSEM_CONST_H - -#define RWSEM_UNLOCKED_VALUE 0x00000000 -#define RWSEM_ACTIVE_BIAS 0x00000001 -#define RWSEM_ACTIVE_MASK 0x0000ffff -#define RWSEM_WAITING_BIAS (-0x00010000) -#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - -#endif /* _SPARC64_RWSEM_CONST_H */ |
