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authorPaul Mundt <lethal@linux-sh.org>2009-10-27 10:35:02 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-10-27 10:35:02 +0900
commit01be5d63fd4645eab1d05a7caa04462c11c8b7a1 (patch)
tree9c316a404a55dc2a43ef5e0156590d37a828cf54 /arch/sh
parent3f375f12ecb9c691dda70bb64b313e55fe6ee4ee (diff)
downloadop-kernel-dev-01be5d63fd4645eab1d05a7caa04462c11c8b7a1.zip
op-kernel-dev-01be5d63fd4645eab1d05a7caa04462c11c8b7a1.tar.gz
sh: Revamp PCI DMA coherence Kconfig bits.
Leaving this configurable caused more trouble than it was ever worth, so just make it explicit. Boards that are verified one way or the other can fix up their selects accordingly. We presently default to non-coherent for most platforms. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/Kconfig7
-rw-r--r--arch/sh/drivers/pci/Kconfig12
-rw-r--r--arch/sh/include/asm/pci.h20
-rw-r--r--arch/sh/kernel/dma-nommu.c4
4 files changed, 18 insertions, 25 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 2d3a699..e5ee3b1 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -169,6 +169,12 @@ config ARCH_HAS_CPU_IDLE_WAIT
config IO_TRAPPED
bool
+config DMA_COHERENT
+ bool
+
+config DMA_NONCOHERENT
+ def_bool !DMA_COHERENT
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
@@ -217,6 +223,7 @@ config CPU_SHX2
config CPU_SHX3
bool
+ select DMA_COHERENT
config ARCH_SHMOBILE
bool
diff --git a/arch/sh/drivers/pci/Kconfig b/arch/sh/drivers/pci/Kconfig
index e8db585..78a3ce1 100644
--- a/arch/sh/drivers/pci/Kconfig
+++ b/arch/sh/drivers/pci/Kconfig
@@ -5,15 +5,3 @@ config PCI
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
your box. If you have PCI, say Y, otherwise N.
-
-config SH_PCIDMA_NONCOHERENT
- bool "Cache and PCI noncoherent"
- depends on PCI
- default y
- help
- Enable this option if your platform does not have a CPU cache which
- remains coherent with PCI DMA. It is safest to say 'Y', although you
- will see better performance if you can say 'N', because the PCI DMA
- code will not have to flush the CPU's caches. If you have a PCI host
- bridge integrated with your SH CPU, refer carefully to the chip specs
- to see if you can say 'N' here. Otherwise, leave it as 'Y'.
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 6bf276b..67f3999 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -57,19 +57,13 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
/* pci_unmap_{single,page} being a nop depends upon the
* configuration.
*/
-#ifdef CONFIG_SH_PCIDMA_NONCOHERENT
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
- dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
- __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME) \
- ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
- (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME) \
- ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
- (((PTR)->LEN_NAME) = (VAL))
+#ifdef CONFIG_DMA_NONCOHERENT
+#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
+#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
+#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
+#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
+#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
+#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
#else
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c
index b336fcf..3c55b87 100644
--- a/arch/sh/kernel/dma-nommu.c
+++ b/arch/sh/kernel/dma-nommu.c
@@ -44,6 +44,7 @@ static int nommu_map_sg(struct device *dev, struct scatterlist *sg,
return nents;
}
+#ifdef CONFIG_DMA_NONCOHERENT
static void nommu_sync_single(struct device *dev, dma_addr_t addr,
size_t size, enum dma_data_direction dir)
{
@@ -59,14 +60,17 @@ static void nommu_sync_sg(struct device *dev, struct scatterlist *sg,
for_each_sg(sg, s, nelems, i)
dma_cache_sync(dev, sg_virt(s), s->length, dir);
}
+#endif
struct dma_map_ops nommu_dma_ops = {
.alloc_coherent = dma_generic_alloc_coherent,
.free_coherent = dma_generic_free_coherent,
.map_page = nommu_map_page,
.map_sg = nommu_map_sg,
+#ifdef CONFIG_DMA_NONCOHERENT
.sync_single_for_device = nommu_sync_single,
.sync_sg_for_device = nommu_sync_sg,
+#endif
.is_phys = 1,
};
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