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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-11-10 18:59:28 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-12-17 11:19:08 +0100 |
| commit | 0a036681888f417e365e0b2935ff6f3f0273f843 (patch) | |
| tree | f0e3bd8c8c10448f0b4fde3684971a1549348acf /arch/sh | |
| parent | 6441d314b4d898d871f21196fb5e6e4f82caedc7 (diff) | |
| download | op-kernel-dev-0a036681888f417e365e0b2935ff6f3f0273f843.zip op-kernel-dev-0a036681888f417e365e0b2935ff6f3f0273f843.tar.gz | |
sh: sh7734: Correct SCIF type for BRG
The SCIF variant in the sh7734 SoC is not the common "SH-4(A)" variant,
but a derivative with added "Baud Rate Generator for External Clock"
(BRG). Correct the regtype value in platform data to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7734.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c index f617bcb..69b8a50 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c @@ -28,7 +28,7 @@ static struct plat_sci_port scif0_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, - .regtype = SCIx_SH4_SCIF_REGTYPE, + .regtype = SCIx_SH4_SCIF_BRG_REGTYPE, }; static struct resource scif0_resources[] = { @@ -50,7 +50,7 @@ static struct plat_sci_port scif1_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, - .regtype = SCIx_SH4_SCIF_REGTYPE, + .regtype = SCIx_SH4_SCIF_BRG_REGTYPE, }; static struct resource scif1_resources[] = { @@ -72,7 +72,7 @@ static struct plat_sci_port scif2_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, - .regtype = SCIx_SH4_SCIF_REGTYPE, + .regtype = SCIx_SH4_SCIF_BRG_REGTYPE, }; static struct resource scif2_resources[] = { @@ -94,7 +94,7 @@ static struct plat_sci_port scif3_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, - .regtype = SCIx_SH4_SCIF_REGTYPE, + .regtype = SCIx_SH4_SCIF_BRG_REGTYPE, }; static struct resource scif3_resources[] = { @@ -116,7 +116,7 @@ static struct plat_sci_port scif4_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, - .regtype = SCIx_SH4_SCIF_REGTYPE, + .regtype = SCIx_SH4_SCIF_BRG_REGTYPE, }; static struct resource scif4_resources[] = { @@ -138,7 +138,7 @@ static struct plat_sci_port scif5_platform_data = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, - .regtype = SCIx_SH4_SCIF_REGTYPE, + .regtype = SCIx_SH4_SCIF_BRG_REGTYPE, }; static struct resource scif5_resources[] = { |
