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authorPaul Mundt <lethal@linux-sh.org>2008-08-04 12:51:06 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-08-04 12:51:06 +0900
commit6a9545bd95e88d61df942b9087cb59b8c7a6dc56 (patch)
treec89ca9fa397b92a19a07a6d000e9e1cbf25016ef /arch/sh
parent617870632de6739fca0893f3e6648e9ae1bd0ddb (diff)
downloadop-kernel-dev-6a9545bd95e88d61df942b9087cb59b8c7a6dc56.zip
op-kernel-dev-6a9545bd95e88d61df942b9087cb59b8c7a6dc56.tar.gz
sh: Fix up broken kerneldoc comments.
These were completely unparseable, so fix them up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/include/asm/tlb_64.h12
-rw-r--r--arch/sh/kernel/cpu/sh4/sq.c2
-rw-r--r--arch/sh/mm/tlb-sh5.c20
3 files changed, 10 insertions, 24 deletions
diff --git a/arch/sh/include/asm/tlb_64.h b/arch/sh/include/asm/tlb_64.h
index 0a96f3a..ef0ae2a 100644
--- a/arch/sh/include/asm/tlb_64.h
+++ b/arch/sh/include/asm/tlb_64.h
@@ -21,11 +21,9 @@
#ifndef __ASSEMBLY__
/**
- * for_each_dtlb_entry
+ * for_each_dtlb_entry - Iterate over free (non-wired) DTLB entries
*
* @tlb: TLB entry
- *
- * Iterate over free (non-wired) DTLB entries
*/
#define for_each_dtlb_entry(tlb) \
for (tlb = cpu_data->dtlb.first; \
@@ -33,11 +31,9 @@
tlb += cpu_data->dtlb.step)
/**
- * for_each_itlb_entry
+ * for_each_itlb_entry - Iterate over free (non-wired) ITLB entries
*
* @tlb: TLB entry
- *
- * Iterate over free (non-wired) ITLB entries
*/
#define for_each_itlb_entry(tlb) \
for (tlb = cpu_data->itlb.first; \
@@ -45,11 +41,9 @@
tlb += cpu_data->itlb.step)
/**
- * __flush_tlb_slot
+ * __flush_tlb_slot - Flushes TLB slot @slot.
*
* @slot: Address of TLB slot.
- *
- * Flushes TLB slot @slot.
*/
static inline void __flush_tlb_slot(unsigned long long slot)
{
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index dcdf959..8a8a993 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -199,7 +199,7 @@ EXPORT_SYMBOL(sq_remap);
/**
* sq_unmap - Unmap a Store Queue allocation
- * @map: Pre-allocated Store Queue mapping.
+ * @vaddr: Pre-allocated Store Queue mapping.
*
* Unmaps the store queue allocation @map that was previously created by
* sq_remap(). Also frees up the pte that was previously inserted into
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index f34274a..dae1312 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -15,9 +15,7 @@
#include <asm/mmu_context.h>
/**
- * sh64_tlb_init
- *
- * Perform initial setup for the DTLB and ITLB.
+ * sh64_tlb_init - Perform initial setup for the DTLB and ITLB.
*/
int __init sh64_tlb_init(void)
{
@@ -46,9 +44,7 @@ int __init sh64_tlb_init(void)
}
/**
- * sh64_next_free_dtlb_entry
- *
- * Find the next available DTLB entry
+ * sh64_next_free_dtlb_entry - Find the next available DTLB entry
*/
unsigned long long sh64_next_free_dtlb_entry(void)
{
@@ -56,9 +52,7 @@ unsigned long long sh64_next_free_dtlb_entry(void)
}
/**
- * sh64_get_wired_dtlb_entry
- *
- * Allocate a wired (locked-in) entry in the DTLB
+ * sh64_get_wired_dtlb_entry - Allocate a wired (locked-in) entry in the DTLB
*/
unsigned long long sh64_get_wired_dtlb_entry(void)
{
@@ -71,12 +65,10 @@ unsigned long long sh64_get_wired_dtlb_entry(void)
}
/**
- * sh64_put_wired_dtlb_entry
+ * sh64_put_wired_dtlb_entry - Free a wired (locked-in) entry in the DTLB.
*
* @entry: Address of TLB slot.
*
- * Free a wired (locked-in) entry in the DTLB.
- *
* Works like a stack, last one to allocate must be first one to free.
*/
int sh64_put_wired_dtlb_entry(unsigned long long entry)
@@ -115,7 +107,7 @@ int sh64_put_wired_dtlb_entry(unsigned long long entry)
}
/**
- * sh64_setup_tlb_slot
+ * sh64_setup_tlb_slot - Load up a translation in a wired slot.
*
* @config_addr: Address of TLB slot.
* @eaddr: Virtual address.
@@ -154,7 +146,7 @@ inline void sh64_setup_tlb_slot(unsigned long long config_addr,
}
/**
- * sh64_teardown_tlb_slot
+ * sh64_teardown_tlb_slot - Teardown a translation.
*
* @config_addr: Address of TLB slot.
*
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