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authorPaul Mundt <lethal@linux-sh.org>2010-10-02 19:43:40 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-10-02 19:43:40 +0900
commit742759eae6b58a172d8f79ff0938d1e25dc9abc5 (patch)
tree455f25ce9eb3a15ba4d35b7f45140d5506a81b45 /arch/sh
parent720a6bd785f92782921a1d0f00f15d60997f4037 (diff)
downloadop-kernel-dev-742759eae6b58a172d8f79ff0938d1e25dc9abc5.zip
op-kernel-dev-742759eae6b58a172d8f79ff0938d1e25dc9abc5.tar.gz
sh: Handle pinmux for SH-X3 proto IRQ/IRL modes.
The SH-X3 proto CPU has all of the external IRQ and IRL pins muxed, make sure that we're able to grab them before attempting to register their respective IRQ controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/Kconfig1
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c24
2 files changed, 25 insertions, 0 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index e46b61d..803f0c1 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -466,6 +466,7 @@ config CPU_SUBTYPE_SHX3
select CPU_SH4A
select CPU_SHX3
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
+ select ARCH_REQUIRE_GPIOLIB
# SH4AL-DSP Processor Support
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 04a4874..f159ea2 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -12,7 +12,9 @@
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/io.h>
+#include <linux/gpio.h>
#include <linux/sh_timer.h>
+#include <cpu/shx3.h>
#include <asm/mmzone.h>
/*
@@ -440,11 +442,33 @@ static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,
void __init plat_irq_setup_pins(int mode)
{
+ int ret = 0;
+
switch (mode) {
case IRQ_MODE_IRQ:
+ ret |= gpio_request(GPIO_FN_IRQ3, intc_desc_irq.name);
+ ret |= gpio_request(GPIO_FN_IRQ2, intc_desc_irq.name);
+ ret |= gpio_request(GPIO_FN_IRQ1, intc_desc_irq.name);
+ ret |= gpio_request(GPIO_FN_IRQ0, intc_desc_irq.name);
+
+ if (unlikely(ret)) {
+ pr_err("Failed to set IRQ mode\n");
+ return;
+ }
+
register_intc_controller(&intc_desc_irq);
break;
case IRQ_MODE_IRL3210:
+ ret |= gpio_request(GPIO_FN_IRL3, intc_desc_irl.name);
+ ret |= gpio_request(GPIO_FN_IRL2, intc_desc_irl.name);
+ ret |= gpio_request(GPIO_FN_IRL1, intc_desc_irl.name);
+ ret |= gpio_request(GPIO_FN_IRL0, intc_desc_irl.name);
+
+ if (unlikely(ret)) {
+ pr_err("Failed to set IRL mode\n");
+ return;
+ }
+
register_intc_controller(&intc_desc_irl);
break;
default:
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