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authorStuart Menefy <stuart.menefy@st.com>2010-11-11 18:26:31 +0000
committerPaul Mundt <lethal@linux-sh.org>2011-02-15 16:24:05 +0900
commita086536858ad0eb51c58074af2fc2c89ba9c1f5e (patch)
treeb15d3f63217842dd6d89d85dd2b8b216a82a3a5f /arch/sh/lib
parent795abaf1e4e188c4171e3cd3dbb11a9fcacaf505 (diff)
downloadop-kernel-dev-a086536858ad0eb51c58074af2fc2c89ba9c1f5e.zip
op-kernel-dev-a086536858ad0eb51c58074af2fc2c89ba9c1f5e.tar.gz
sh: Ensure ST40-300 BogoMIPS value is consistent
A strange variation was seen in the BogoMIPS figure for the ST40-300. This was eventually tracked down to sensitivity to the alignment of the loop. So add an align directive to ensure this doesn't occur. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/lib')
-rw-r--r--arch/sh/lib/delay.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c
index faa8f86..0901b2f 100644
--- a/arch/sh/lib/delay.c
+++ b/arch/sh/lib/delay.c
@@ -10,6 +10,16 @@
void __delay(unsigned long loops)
{
__asm__ __volatile__(
+ /*
+ * ST40-300 appears to have an issue with this code,
+ * normally taking two cycles each loop, as with all
+ * other SH variants. If however the branch and the
+ * delay slot straddle an 8 byte boundary, this increases
+ * to 3 cycles.
+ * This align directive ensures this doesn't occur.
+ */
+ ".balign 8\n\t"
+
"tst %0, %0\n\t"
"1:\t"
"bf/s 1b\n\t"
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