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author | Paul Mundt <lethal@linux-sh.org> | 2010-03-29 17:10:06 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2010-03-29 17:10:06 +0900 |
commit | c55fbdd3f97a468d51cbdb03bb7c9c7287fbda2f (patch) | |
tree | 0686a6e20a86b1dd79929a4f7b571dff479bbb2d /arch/sh/kernel | |
parent | e21d2aa76e1fc91cbf18c4b593d32112d954fab5 (diff) | |
download | op-kernel-dev-c55fbdd3f97a468d51cbdb03bb7c9c7287fbda2f.zip op-kernel-dev-c55fbdd3f97a468d51cbdb03bb7c9c7287fbda2f.tar.gz |
sh: sh7785 clkdev lookups.
Convert to TMU clock lookups for SH7785.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7785.c | 39 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 6 |
2 files changed, 38 insertions, 7 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c index 6061c73..28de049 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c @@ -3,7 +3,7 @@ * * SH7785 support for the clock framework * - * Copyright (C) 2007 - 2009 Paul Mundt + * Copyright (C) 2007 - 2010 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -14,6 +14,7 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/cpufreq.h> +#include <asm/clkdev.h> #include <asm/clock.h> #include <asm/freq.h> #include <cpu/sh7785.h> @@ -113,12 +114,48 @@ static struct clk mstp_clks[] = { SH_CLK_MSTP32("gdta_fck", -1, NULL, MSTPCR1, 0, 0), }; +static struct clk_lookup lookups[] = { + { + /* TMU0 */ + .dev_id = "sh_tmu.0", + .con_id = "tmu_fck", + .clk = &mstp_clks[13], /* tmu012_fck */ + }, { + /* TMU1 */ + .dev_id = "sh_tmu.1", + .con_id = "tmu_fck", + .clk = &mstp_clks[13], + }, { + /* TMU2 */ + .dev_id = "sh_tmu.2", + .con_id = "tmu_fck", + .clk = &mstp_clks[13], + }, { + /* TMU3 */ + .dev_id = "sh_tmu.3", + .con_id = "tmu_fck", + .clk = &mstp_clks[12], /* tmu345_fck */ + }, { + /* TMU4 */ + .dev_id = "sh_tmu.4", + .con_id = "tmu_fck", + .clk = &mstp_clks[12], + }, { + /* TMU5 */ + .dev_id = "sh_tmu.5", + .con_id = "tmu_fck", + .clk = &mstp_clks[12], + }, +}; + int __init arch_clk_init(void) { int i, ret = 0; for (i = 0; i < ARRAY_SIZE(clks); i++) ret |= clk_register(clks[i]); + for (i = 0; i < ARRAY_SIZE(lookups); i++) + clkdev_add(&lookups[i]); if (!ret) ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index 76afe57..07bb2d4 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -113,7 +113,6 @@ static struct platform_device scif5_device = { static struct sh_timer_config tmu0_platform_data = { .channel_offset = 0x04, .timer_bit = 0, - .clk = "tmu012_fck", .clockevent_rating = 200, }; @@ -142,7 +141,6 @@ static struct platform_device tmu0_device = { static struct sh_timer_config tmu1_platform_data = { .channel_offset = 0x10, .timer_bit = 1, - .clk = "tmu012_fck", .clocksource_rating = 200, }; @@ -171,7 +169,6 @@ static struct platform_device tmu1_device = { static struct sh_timer_config tmu2_platform_data = { .channel_offset = 0x1c, .timer_bit = 2, - .clk = "tmu012_fck", }; static struct resource tmu2_resources[] = { @@ -199,7 +196,6 @@ static struct platform_device tmu2_device = { static struct sh_timer_config tmu3_platform_data = { .channel_offset = 0x04, .timer_bit = 0, - .clk = "tmu345_fck", }; static struct resource tmu3_resources[] = { @@ -227,7 +223,6 @@ static struct platform_device tmu3_device = { static struct sh_timer_config tmu4_platform_data = { .channel_offset = 0x10, .timer_bit = 1, - .clk = "tmu345_fck", }; static struct resource tmu4_resources[] = { @@ -255,7 +250,6 @@ static struct platform_device tmu4_device = { static struct sh_timer_config tmu5_platform_data = { .channel_offset = 0x1c, .timer_bit = 2, - .clk = "tmu345_fck", }; static struct resource tmu5_resources[] = { |