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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-01-11 15:10:08 +1100 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-01-11 15:10:08 +1100 |
commit | eed0ba0b4ab2d1668588219a8efa81bf8636a12d (patch) | |
tree | f5aa3c732e7830a1b24e6071f8bed0f799881187 /arch/sh/boards/mach-ecovec24/setup.c | |
parent | 98b14d6b290d96b24ae993ceaccc59b2aa4b130c (diff) | |
parent | c9de9333f5a860cab82052bce6ac28bcac9b2c26 (diff) | |
download | op-kernel-dev-eed0ba0b4ab2d1668588219a8efa81bf8636a12d.zip op-kernel-dev-eed0ba0b4ab2d1668588219a8efa81bf8636a12d.tar.gz |
Merge remote branch 'gcl/next' into next
Diffstat (limited to 'arch/sh/boards/mach-ecovec24/setup.c')
-rw-r--r-- | arch/sh/boards/mach-ecovec24/setup.c | 34 |
1 files changed, 4 insertions, 30 deletions
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index 2eaeb9e..f48c492 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c @@ -720,32 +720,6 @@ static struct platform_device camera_devices[] = { }; /* FSI */ -/* - * FSI-B use external clock which came from da7210. - * So, we should change parent of fsi - */ -#define FCLKBCR 0xa415000c -static void fsimck_init(struct clk *clk) -{ - u32 status = __raw_readl(clk->enable_reg); - - /* use external clock */ - status &= ~0x000000ff; - status |= 0x00000080; - - __raw_writel(status, clk->enable_reg); -} - -static struct clk_ops fsimck_clk_ops = { - .init = fsimck_init, -}; - -static struct clk fsimckb_clk = { - .ops = &fsimck_clk_ops, - .enable_reg = (void __iomem *)FCLKBCR, - .rate = 0, /* unknown */ -}; - static struct sh_fsi_platform_info fsi_info = { .portb_flags = SH_FSI_BRS_INV | SH_FSI_OUT_SLAVE_MODE | @@ -1264,10 +1238,10 @@ static int __init arch_setup(void) /* change parent of FSI B */ clk = clk_get(NULL, "fsib_clk"); if (!IS_ERR(clk)) { - clk_register(&fsimckb_clk); - clk_set_parent(clk, &fsimckb_clk); - clk_set_rate(clk, 11000); - clk_set_rate(&fsimckb_clk, 11000); + /* 48kHz dummy clock was used to make sure 1/1 divide */ + clk_set_rate(&sh7724_fsimckb_clk, 48000); + clk_set_parent(clk, &sh7724_fsimckb_clk); + clk_set_rate(clk, 48000); clk_put(clk); } |