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author | Will Deacon <will.deacon@arm.com> | 2015-10-06 18:46:23 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2015-10-07 11:45:27 +0100 |
commit | 8e63d38876691756f9bc6930850f1fb77809be1b (patch) | |
tree | 74f5a739675a90c71d1f07e937c2e3f512781b7e /arch/score | |
parent | fa7aae8a4257e6be7051420dac1f150c1eef721b (diff) | |
download | op-kernel-dev-8e63d38876691756f9bc6930850f1fb77809be1b.zip op-kernel-dev-8e63d38876691756f9bc6930850f1fb77809be1b.tar.gz |
arm64: flush: use local TLB and I-cache invalidation
There are a number of places where a single CPU is running with a
private page-table and we need to perform maintenance on the TLB and
I-cache in order to ensure correctness, but do not require the operation
to be broadcast to other CPUs.
This patch adds local variants of tlb_flush_all and __flush_icache_all
to support these use-cases and updates the callers respectively.
__local_flush_icache_all also implies an isb, since it is intended to be
used synchronously.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Daney <david.daney@cavium.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/score')
0 files changed, 0 insertions, 0 deletions